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XC9572 データシートの表示(PDF) - Xilinx Inc

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XC9572 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
XC9572 In-System Programmable CPLD
JTAG Port
3
1
JTAG
Controller
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
I/O/GCK
1
I/O/GSR
2
I/O/GTS
I/O
Blocks
In-System Programming Controller
36
18
36
18
36
18
36
18
Function
Block 1
Macrocells
1 to 18
Function
Block 2
Macrocells
1 to 18
Function
Block 3
Macrocells
1 to 18
Function
Block 4
Macrocells
1 to 18
Figure 2: XC9572 Architecture
Note: Function Block outputs (indicated by the bold line) drive the I/O Blocks directly
X5921
2
December 4, 1998 (Version 3.0)

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