Philips Semiconductors
Digital Signal Processor (DSP) for
cameras
Preliminary specification
SAA8110G
CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VDACs specification
OUTPUTS PINS OUT1 TO OUT3 (IN CASE OF SCALE FACTOR = 1)
Vo
output voltage (see note 1)
code 0
code 511
Voffset
amplitude offset voltage between
DACs
INPUTS
Rbias
bias resistor
note 2
note 3
Rext
external anti-reflection resistor note 2
note 3
Cdecoup
decoupling capacitor
TRANSFER FUNCTION
RES
resolution
NLdiff
NLint
THD60
S/N
differential non-linearity
integral non-linearity
total harmonic distortion at 60%
of full-scale
signal-to-noise ratio
fclk = 30 MHz, fi = 1 MHz,
VDDA = 5 V
fclk = 30 MHz, fo = 1 MHz,
VDDA = 5 V
APPLICATION1: PAL/NTSC HIGH RESOLUTION
VDD1
VDD2
CR
supply voltage
supply voltage
conversion rate
fclk
clock frequency
Ba
analog bandwidth
APPLICATION 2: PAL/NTSC MEDIUM RESOLUTION
VDD1
VDD2
fclk
Ba
supply voltage
supply voltage
clock frequency
analog bandwidth
SWITCHING CHARACTERISTICS ON RISING FULL-SCALE STEP (see Fig.16)
tPD
tst(10-90)
tst(LSB)
propagation delay time
settling time
setting time (to ±1 LSB)
to 50% value
10% to 90% full-scale
MIN. TYP. MAX. UNIT
0
0.2
1.3
1.5
−60
0.3
V
1.6
V
+60
mV
14
15
16
kΩ
44
47
50
kΩ
−
21
−
Ω
−
70.6 −
Ω
10
−
100
nF
−
9
−
bit
−
−
1.5
LSB
−
−
1.5
LSB
−
55
45
dB
−
45
38
dB
4.5
5.0
5.5
V
3.0
3.3
3.6
V
−
28.6 −
MHz
−
28.6 −
MHz
−
7.6
−
MHz
4.5
5.0
5.5
V
3.0
3.3
3.6
V
−
19
−
MHz
−
6.5
−
MHz
−
9
13
ns
−
9
11
ns
−
25
30
ns
1997 Jun 13
17