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FSA2267(2007_03) データシートの表示(PDF) - Fairchild Semiconductor

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FSA2267
(Rev.:2007_03)
Fairchild
Fairchild Semiconductor Fairchild
FSA2267 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
FSA2267A DC Electrical Characteristics
All typical values are at 25°C unless otherwise specified.
Symbol
Parameter
Conditions
VCC
TA = +25°C
TA= 40 to
+85°C Units
(V) Min. Typ. Max. Min. Max.
3.6 to 4.3
1.7
VIH Input Voltage High
2.7 to 3.6
2.3 to 2.7
1.5
V
1.4
3.6 to 4.3
0.7
VIL
Input Voltage Low
2.7 to 3.6
2.3 to 2.7
0.5 V
0.4
IIN
Control Input Leakage VIN = 0V to VCC
nA = 0.3V, 4.0V, nB0 or nB1
= 4.0V, 0.3V or floating
2.3 to 4.3
4.3 -10.0
-0.5 0.5 µA
10.0 -100 100
INO(OFF), Off-Leakage Current of
INC(OFF) Port nB0 and nB1
nA = 0.3V, 3.3V, nB0 or nB1
= 0.3V, 3.3V or floating
nA = 0.3V, 2.4V, nB0 or nB1 =
0.3V, 2.4V or floating
3.6
-5.0
2.7
-5.0
5.0 -50 50 nA
5.0 -50 50
nA = 0.3V, 4.0V, nB0 or nB1 =
0.3V, 4.0V or floating
4.3 -20.0
20.0 -200 200
IA(ON)
On Leakage Current of
Port 1A and 2A
nA = 0.3V, 3.3V, nB0 or nB1 =
0.3V, 3.3V or floating
3.6
-5.0
5.0 -50 50 nA
nA = 0.3V, 3.3V, nB0 or nB1
= 0.3V, 3.3V or floating
2.7
-5.0
5.0 -50 50
IOUT = 100mA, nB0 or nB1
= 0V, 0.7V, 3.6V, 4.3V
4.3
0.35
0.6
RON
IOUT = 100mA, nB0 or nB1
Switch On Resistance(7) = 0V, 0.7V, 2.3V, 3.0V
3.0
IOUT = 100mA, nB0 or nB1
= 0V, 0.7V, 2.0V, 2.7V
2.7
0.35
0.35
0.6
Ω
0.6
IOUT = 100mA, nB0 or nB1 = 0.8V 1.65
4.3
ΔRON
On Resistance Matching
Between Channels(8)
See Figure 10
IOUT = 100mA, nB0 or nB1 = 0.7V
3.0
2.7
1.65
1.0
0.04
0.04
0.04
0.1
0.075
0.075
Ω
0.075
4.3
0.15
0.25
RFLAT(ON)
On Resistance
Flatness(9)
IOUT = 100mA, nB0 or nB1 = 0V
3.0
to VCC
2.7
0.15
0.15
0.25
Ω
0.25
1.65
0.3
ICC
ICCT
Quiescent Supply Current VIN = 0V or VCC, IOUT = 0A
Increase in ICC per Input
VIN = 1.8V
VIN = 2.6V
4.3
-100 80 100 -500 500 nA
7.0 10.0
15.0
4.3
µA
0.5 2.0
7.0
Notes:
7. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.
8. ΔRON = RONmax - RONmin measured at identical VCC, temperature, and voltage.
9. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of
conditions.
© 2005 Fairchild Semiconductor Corporation
FSA2267 / FSA2267A Rev. 1.0.3
6
www.fairchildsemi.com

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