MC54HC139AJ データシートの表示（PDF） - Motorola => Freescale
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MC54HC139AJ Datasheet PDF : 6 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 1-of-4 Decoder/
Demultiplexer
High–Performance Silicon–Gate CMOS
The MC54/74HC139A is identical in pinout to the LS139. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This device consists of two independent 1–of–4 decoders, each of which
decodes a two–bit Address to one–of–four active–low outputs. Active–low
Selects are provided to facilitate the demultiplexing and cascading functions.
The demultiplexing function is accomplished by using the Address inputs to
select the desired device output, and utilizing the Select as a data input.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 100 FETs or 25 Equivalent Gates
LOGIC DIAGRAM
ADDRESS
INPUTS
A0a 2
A1a 3
SELECTa 1
4 Y0a
5 Y1a
6 Y2a
7 Y3a
ACTIVE–LOW
OUTPUTS
ADDRESS
INPUTS
A0b 14
A1b 13
12 Y0b
11 Y1b
10 Y2b
9 Y3b
ACTIVE–LOW
OUTPUTS
SELECTb 15
PIN 16 = VCC
PIN 8 = GND
MC54/74HC139A
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
D SUFFIX
SOIC PACKAGE
CASE 751B–05
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
Ceramic
Plastic
SOIC
PIN ASSIGNMENT
SELECTa 1
A0a 2
A1a 3
Y0a 4
Y1a 5
Y2a 6
Y3a 7
GND 8
16 VCC
15 SELECTb
14 A0b
13 A1b
12 Y0b
11 Y1b
10 Y2b
9 Y3b
FUNCTION TABLE
Inputs
Select A1 A0
H
XX
L
LL
L
LH
L
HL
L
HH
X = don’t care
Outputs
Y0 Y1 Y2 Y3
H HH H
L HH H
H LH H
H HL H
H HH L
10/95
© Motorola, Inc. 1995
1
REV 6
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