LTC2451 データシートの表示（PDF） - Linear Technology
部品番号
コンポーネント説明
メーカー
LTC2451 Datasheet PDF : 18 Pages
| |||
LTC2451
ANALOG INPUT AND REFERENCES The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VIN
VREF+
VREF–
Input Voltage Range
Positive Reference Voltage Range
Negative Reference Voltage Range
VREF+ – VREF– ≥ 2.5V
VREF+ – VREF– ≥ 2.5V
l VREF–
l VCC – 2.5
l
0
VREF+
V
VCC
V
VCC – 2.5
V
CIN
IN Sampling Capacitance
0.35
pF
IDC_LEAK(VIN)
IN DC Leakage Current
IDC_LEAK(REF+, REF–) REF+, REF– DC Leakage Current
VIN = GND (Note 8)
VIN = VCC (Note 8)
VREF = 5V (Note 8)
l –10
1
10
nA
l –10
1
10
nA
l –10
1
10
nA
ICONV
Input Sampling Current (Note 5)
50
nA
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VCC
Supply Voltage
ICC
Supply Current
Conversion
Sleep
l 2.7
5.5
V
l
400
700
μA
l
0.2
0.5
μA
I C INPUTS AND OUTPUTS 2
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
l 0.7VCC
l
V
0.3VCC
V
VHYS
Hysteresis of Schmidt Trigger Inputs
(Note 3)
VOL
Low Level Output Voltage (SDA)
I = 3mA
l 0.05VCC
l
V
0.4
V
IIN
Input Leakage
0.1VCC ≤ VIN ≤ 0.9VCC
l –1
CI
Capacitance for Each I/O Pin
l 10
CB
Capacitance Load for Each Bus Line
l
1
μA
pF
400
pF
I2C TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V. (Notes 2, 7)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
tCONV
Conversion Time
30Hz Mode
l
26
33.2
46
tCONV
fSCL
tHD(SDA)
tLOW
tHIGH
Conversion Time
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of the SCL Pin
High Period of the SCL Pin
60Hz Mode
l
13
16.6
23
l
0
400
l
0.6
l
1.3
l
0.6
tSU(STA)
tHD(DAT)
tSU(DAT)
Set-Up Time for a Repeated Start Condition
Data Hold Time
Data Set-Up Time
l
0.6
l
0
0.9
l
100
tr
Rise Time for SDA/SCL Signals
(Note 6)
l 20 + 0.1CB
300
tf
Fall Time for SDA/SCL Signals
(Note 6)
l 20 + 0.1CB
300
tSU(STO)
Set-Up Time for Stop Condition
l
0.6
tBUF
Bus Free Time Between a Stop and Start Condition
l
1.3
UNITS
ms
ms
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
2451ff
3
Share Link: 