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FAN3224 データシートの表示(PDF) - Fairchild Semiconductor

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FAN3224
Fairchild
Fairchild Semiconductor Fairchild
FAN3224 Datasheet PDF : 27 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Package Outlines
Figure 2. 3x3 mm MLP-8 (Top View)
Figure 3. SOIC-8 (Top View)
Thermal Characteristics(2)
Package
JL(3) JT(4) JA(5) JB(6) JT(7) Units
8-Lead 3x3 mm Molded Leadless Package (MLP)
1.2
64
42
2.8
0.7
°C/W
8-Pin Small Outline Integrated Circuit (SOIC)
38
29
87
41
2.3
°C/W
Notes:
2. Estimates derived from thermal simulation; actual values depend on the application.
3. Theta_JL (JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any
thermal pad) that are typically soldered to a PCB.
4. Theta_JT (JT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is
held at a uniform temperature by a top-side heatsink.
5. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.
The value given is for natural convection with no heatsink using a 2S2P board, as specified in JEDEC standards JESD51-2,
JESD51-5, and JESD51-7, as appropriate.
6. Psi_JB (JB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an
application circuit board reference point for the thermal environment defined in Note 5. For the MLP-8 package, the board
reference is defined as the PCB copper connected to the thermal pad and protruding from either end of the package. For the
SOIC-8 package, the board reference is defined as the PCB copper adjacent to pin 6.
7. Psi_JT (JT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and
the center of the top of the package for the thermal environment defined in Note 5.
© 2007 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225 • Rev. 1.1.4
3
www.fairchildsemi.com

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