CY8C24693 データシートの表示（PDF） - Cypress Semiconductor
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CY8C24693 Datasheet PDF : 65 Pages
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CY8C24X93
PSoC® Functional Overview
The PSoC family consists of on-chip controller devices, which
are designed to replace multiple traditional microcontroller unit
(MCU)-based components with one, low cost single-chip
programmable component. A PSoC device includes
configurable analog and digital blocks, and programmable
interconnect. This architecture allows the user to create
customized peripheral configurations, to match the requirements
of each individual application. Additionally, a fast CPU, Flash
program memory, SRAM data memory, and configurable I/O are
included in a range of convenient pinouts.
The architecture for this device family, as shown in the Logic
Block Diagram on page 2, consists of three main areas:
■ The Core
■ Analog System
■ System Resources (including a full-speed USB port).
A common, versatile bus allows connection between I/O and the
analog system.
Depending on the PSoC package, up to 36 GPIO are included in
the CY8C24x93 PSoC device. The GPIO provides access to the
MCU and analog mux.
PSoC Core
The PSoC Core is a powerful engine that supports a rich
instruction set. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers, and IMO and
ILO. The CPU core, called the M8C, is a powerful processor with
speeds up to 24 MHz. The M8C is a 4-MIPS, 8-bit
Harvard-architecture microprocessor.
Analog system
The analog system is composed of an ADC, two comparators
and an IDAC. It has an internal 0.8 V, 1 V or 1.2 V analog
reference. All the pins can be configured to connect to the analog
system.
ADC
The ADC in the CY8C24x93 device is an incremental
analog-to-digital converter with a range of 8 to 10 bits supporting
signed and unsigned data formats. The input to the ADC can be
from any pin.
IDAC
The IDAC can provide current source up to 512 µA to any GPIO
pin. In the CY8C24x93 family of devices 4 ranges of current
source can be implemented that can vary in 255 steps, and are
connected to analog mux bus.
Table 1. IDAC Ranges
Range
1x
2x
4x
8x
Full Scale Range in µA
64
128
256
512
Comparator
The CY8C24x93 family has two high-speed, low-power
comparators. The comparators have three voltage references,
0.8 V, 1.0 V and 1.2 V. Comparator inputs can be connected from
any pin through the analog mux bus. The comparator output can
be read in firmware for processing or routed out via specific pins
(P1_0 or P1_4).
The output of the two comparators can be combined with 2-input
logic functions. The combinatorial output can be optionally
combined with a latched value and routed to a pin output or to
the interrupt controller. The input multiplexers and the
comparator are controller through the CMP User Module.
Document Number: 001-86894 Rev. *B
Page 5 of 65
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