TSA1005-40IF データシートの表示（PDF） - STMicroelectronics
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TSA1005-40IF Datasheet PDF : 22 Pages
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TSA1005
ELECTRICAL CHARACTERISTICS
AVCC = DVCC = VCCB = 2.5 V, Fs = 20/40 Msps, Fin = 10.13 MHz, Vin@ -1 dBFS, VREFP = 0.8 V,
VREFM = 0 V
Tamb = 25°C (unless otherwise specified)
TIMING CHARACTERISTICS
Symbol
Parameter.
FS
Sampling Frequency
DC
Clock Duty Cycle
TC1 Clock pulse width (high)
TC2 Clock pulse width (low)
Tod
Data Output Delay (Clock edge to Data
Valid) - 10pF load capacitance
Tpd I Data Pipeline delay for I channel
Tpd Q Data Pipeline delay for Q channel
Ton
Falling edge of OEB to digital output
valid data
Toff
Rising edge of OEB to digital output
tri-state
1 Preliminary data.
TIMING DIAGRAM
TSA1005-20(1)
Min.
0.5
Typ.
50
25
25
Max.
20
5
7
7.5
1
1
TSA1005-40
Min.
0.5
45
Typ.
50
12.5
12.5
Max.
40
55
Unit
MHz
%
ns
ns
5
ns
7
cycles
7.5
cycles
1
ns
1
ns
Simultaneous sampling
on I/Q channels
I
Q
CLK
N-1
N
N+2
N+1
SELECT
N+4
N+3
N+5
N+6
N+12
N+13
N+7
N+11
N+8
N+10
N+9
Tpd I + Tod
Tod
CLOCK AND SELECT CONNECTED TOGETHER
OEB
DATA
OUTPUT
sample N-9
I channel
4/22
sample N-8
I channel
sample N-6
Q channel
sample N-7
Q channel
sample N sample N+1 sample N+2
Q channel Q channel Q channel
sample N+1 sample N+2 sample N+3
I channel I channel I channel
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