74ALVT16260 データシートの表示（PDF） - NXP Semiconductors.
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74ALVT16260 Datasheet PDF : 19 Pages
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Philips Semiconductors
6. Pinning information
6.1 Pinning
74ALVT16260
12-bit to 24-bit multiplexed D-type latches; 3-state
OEA 1
LE1B 2
2B3 3
GND 4
2B2 5
2B1 6
VCC 7
A1 8
A2 9
A3 10
GND 11
A4 12
A5 13
A6 14
A7 15
A8 16
A9 17
GND 18
A10 19
A11 20
A12 21
VCC 22
1B1 23
1B2 24
GND 25
1B3 26
LE2B 27
SEL 28
Fig 2. Pin configuration
74ALVT16260
56 OE2B
55 LEA2B
54 2B4
53 GND
52 2B5
51 2B6
50 VCC
49 2B7
48 2B8
47 2B9
46 GND
45 2B10
44 2B11
43 2B12
42 1B12
41 1B11
40 1B10
39 GND
38 1B9
37 1B8
36 1B7
35 VCC
34 1B6
33 1B5
32 GND
31 1B4
30 LEA1B
29 OE1B
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6.2 Pin description
Table 3.
Symbol
OEA
LE1B
2B3
GND
2B2
2B1
VCC
A1
Pin description
Pin
1
2
3
4
5
6
7
8
Description
output A enable input (active LOW)
latch 1B to A enable input
2 data input/output B3
ground (0 V)
2 data input/output B2
2 data input/output B1
supply voltage
data input/output A1
74ALVT16260_3
Product data sheet
Rev. 03 — 20 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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