74HC595 データシートの表示（PDF） - ON Semiconductor

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74HC595

8−Bit Serial−Input/Serial or Parallel−Output Shift Register with Latched 3−State Outputs

ON Semiconductor 

PIN ASSIGNMENT

QB 1

QC 2

QD 3

QE 4

QF 5

QG 6

QH 7

GND 8

16 VCC

15 QA

14 A

13 OUTPUT ENABLE

12 LATCH CLOCK

11 SHIFT CLOCK

10 RESET

9 SQH

74HC595

SERIAL

DATA

INPUT

A 14

LOGIC DIAGRAM

SHIFT

REGISTER

LATCH

SHIFT 11

CLOCK

RESET 10

LATCH 12

CLOCK

OUTPUT 13

ENABLE

15 QA

1 QB

2 QC

3 QD

4 QE

5 QF

6 QG

7 QH

PARALLEL

DATA

OUTPUTS

9 SQH

SERIAL

DATA

OUTPUT

VCC = PIN 16

GND = PIN 8

ORDERING INFORMATION

Device

Package

Shipping†

74HC595DR2G

SOIC−16

(Pb−Free)

2500 Tape & Reel

74HC595DTR2G

TSSOP−16*

2500 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

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