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74LVCU04AD データシートの表示(PDF) - NXP Semiconductors.

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74LVCU04AD
NXP
NXP Semiconductors. NXP
74LVCU04AD Datasheet PDF : 17 Pages
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NXP Semiconductors
74LVCU04A
Hex unbuffered inverter
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
40 C to +85 C
Min
Typ[1]
Max
VOL
LOW-level VI = VCC
output
voltage
VCC = 3.0 V; IO = 100 A
-
VCC = 1.65 V; IO = 4 mA
-
VCC = 2.3 V; IO = 8 mA
-
VCC = 2.7 V; IO = 12 mA
-
VCC = 3.0 V; IO = 24 mA
-
II
input leakage VCC = 3.6 V; VI = 5.5 V or GND
-
current
-
0.20
-
0.45
-
0.60
-
0.40
-
0.55
0.1
5
ICC
supply
VCC = 3.6 V; VI = VCC or GND;
-
current
IO = 0 A
ICC additional per input pin;
-
supply
VCC = 2.7 V to 3.6 V;
current
VI = VCC 0.6 V; IO = 0 A
CI
input
VCC = 0 V to 3.6 V;
-
capacitance VI = GND to VCC
0.1
10
5
500
5.5
-
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 C.
10. Dynamic characteristics
40 C to +125 C Unit
Min
Max
-
0.60 V
-
0.65 V
-
0.80 V
-
0.30 V
-
0.80 V
-
20 A
-
40
A
-
5000 A
-
-
pF
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
tpd
propagation delay nA to nY; see Figure 6
[2]
VCC = 1.2 V
-
6.0
-
VCC = 1.65 V to 1.95 V
0.3 3.7 7.8
VCC = 2.3 V to 2.7 V
0.5 2.2 4.4
VCC = 2.7 V
0.5 2.0 4.5
VCC = 3.0 V to 3.6 V
0.5 2.0 4.0
tsk(o)
output skew time
VCC = 3.0 V to 3.6 V
[3]
-
-
1.0
CPD
power dissipation per inverter; VI = GND to VCC [4]
capacitance
VCC = 1.65 V to 1.95 V
-
2.3
-
VCC = 2.3 V to 2.7 V
-
5.5
-
VCC = 3.0 V to 3.6 V
-
8.4
-
40 C to +125 C Unit
Min
Max
-
- ns
0.3
9.0 ns
0.5
5.2 ns
0.5
6.0 ns
0.5
5.0 ns
-
1.5 ns
-
- pF
-
- pF
-
- pF
[1] Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
74LVCU04A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 18 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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