MC14027BCP データシートの表示（PDF） - ON Semiconductor

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MC14027BCP

Dual J−K Flip−Flop

ON Semiconductor 

MC14027B

20 ns

J

K

C

tWH

20 ns

90%

50%

10%

20 ns

tsu

20 ns

90%

50%

10%

tsu

90%

50%

10%

tWL

1

VDD

VSS

20 ns

VDD

th

VSS

20 ns

VDD

VSS

tPLH

Q

tTLH

fcl

90%

50%

10%

tPHL

VOH

VOL

tTHL

Inputs R and S low.

For the measurement of tWH, I/fcl, and PD

the Inputs J and K are kept high.

Figure 1. Dynamic Signal Waveforms

(J, K, Clock, and Output)

20 ns

90%

SET OR

RESET

tw

CLOCK

20 ns

50%

10%

trem

20 ns

90%

50%

tPLH

tw

tPHL

Q or Q

50%

VDD

VSS

20 ns VDD

10% VSS

VOH

VOL

Figure 2. Dynamic Signal Waveforms

(Set, Reset, Clock, and Output)

S

J

K

R

C

LOGIC DIAGRAM

(1/2 of Device Shown)

C

C

C

C

C

C

C

C

Q

C

C

Q

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