MC74HCXXD データシートの表示（PDF） - Motorola => Freescale
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MC74HCXXD Datasheet PDF : 5 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual JK Flip-Flop
With Set and Reset
High–Performance Silicon–Gate CMOS
The MC74HC76 is identical in pinout to the LS76. The device inputs
are compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
Each flip–flop is negative–edge clocked and has active–low asynchro-
nous Set and Reset inputs.
The HC76 is identical in function to the HC112, but has a different
pinout.
• Similar in Function to the LS76 Except When Set and Reset Are
Low Simultaneously
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2 to 6V
• Low Input Current: 1µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 100 FETs or 25 Equivalent Gates
2
Set1
16
K1
1
Clock1
4
J1
3
Reset1
7
Set2
12
K2
6
Clock2
9
J2
8
Reset2
FUNCTION TABLE
LOGIC DIAGRAM
15
Q1
14
Q1
11
Q2
10
Q2
PIN 5 = VCC
PIN 13 = GND
Inputs
Outputs
Set
Reset Clock
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
L*
L*
H
H
L
L
No Change
H
H
L
H
L
H
H
H
H
L
H
L
H
H
H
H
Toggle
H
H
L
X
X
No Change
H
H
H
X
X
No Change
H
H
X
X
No Change
* Both outputs will remain low as long as Set and Reset are low, but the output states are
unpredictable if Set and Reset go high simultaneously.
10/95
© Motorola, Inc. 1995
1
MC74HC76
16
1
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
D SUFFIX
SOIC PACKAGE
CASE 751B–05
ORDERING INFORMATION
MC74HCXXN
MC74HCXXD
Plastic
SOIC
Pinout: 16–Lead Packages (Top View)
Clock1 1
Set1 2
Reset1 3
J1 4
VCC 5
Clock2 6
Set2 7
Reset2 8
16 K1
15 Q1
14 Q1
13 GND
12 K2
11 Q2
10 Q2
9 J2
REV 6
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