HEF4071B データシートの表示（PDF） - NXP Semiconductors.
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HEF4071B Datasheet PDF : 11 Pages
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NXP Semiconductors
HEF4071B
Quad 2-input OR gate
Table 9. Measurement points
Supply voltage
VDD
5 V to 15 V
Input
VM
0.5VDD
Output
VM
0.5VDD
VDD
VI
G
VO
DUT
RT
CL
001aag182
Fig 5.
Test data is given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Test circuit
Table 10. Test data
Supply voltage
VDD
5 V to 15 V
Input
VI
VSS or VDD
tr, tf
≤ 20 ns
Load
CL
50 pF
HEF4071B_4
Product data sheet
Rev. 04 — 28 November 2008
© NXP B.V. 2008. All rights reserved.
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