SMS1242S データシートの表示（PDF） - Summit Microelectronics

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SMS1242S

2.5V, 3V, 3.3V & 5V Dual Voltage, Dual Reset Microprocessor Supervisory Circuits

Summit Microelectronics 

SMS1242

MEMORY OPERATION

The SMS1242 memory is configured as a 2k × 8 array.

Data is read and written via an industry standard two-wire

interface. The bus was designed for two-way, two-line

serial communication between different integrated cir-

cuits. The two lines are a serial data line (SDA) and a serial

clock line (SCL). The SDA line must be connected to a

positive supply by a pull-up resistor located somewhere on

the bus

Device Addressing

Following a start condition the master must output the

address of the slave it is accessing. The most significant

four bits of the slave address are the device type identifier.

For the SMS1242 this is fixed as 1010BIN. The next three

bits are the Most Significant Bits of the data address. They

are supplied for write operations, and are "don't care" for

read operations.

Input Data Protocol

The protocol defines any device that sends data onto the

bus as a “transmitter” and any device that receives data as

a “receiver.” The device controlling data transmission is

called the “master” and the controlled device is called the

“slave.” In all cases the SMS1242 will be a “slave” device

since it never initiates a data transfer.

Read/Write Bit

The last bit of the data stream defines the operation to be

performed. A “1” indicates a read operation; and a “0,” a

write operation.

Device Identifier

MS Address Bits R / W

One data bit is transferred during each clock pulse. The

data on the SDA line must remain stable during clock high

time, because changes on the data line while SCL is high

will be interpreted as start or stop condition.

START and STOP Conditions

When both the data and clock lines are high the bus is said

to be not busy. A high-to-low transition on the data line

while the clock is high is defined as the “START” condition.

A low-to-high transition on the data line while the clock is

high is defined as the “STOP” condition.

Acknowledge (ACK)

Acknowledge is a software convention used to indicate

successful data transfers. The transmitting device, either

the master or the slave, will release the bus after transmit-

ting eight bits. During the ninth clock cycle the receiver will

pull the SDA line low to ACKnowledge that it received the

eight bits of data.

10

1 0 A10 A9 A8 1 / 0

WRITE OPERATIONS

2038 Table02 2.0

The SMS1242 allows two types of write operations: byte

write and page write. A byte write operation writes a single

byte during the nonvolatile write period (tWR). The page

write operation allows up to 16 bytes in the same page to

be written during tWR.

Byte Write

Upon receipt of the word address the SMS1242 responds

with an ACKnowledge. After receiving the next byte of

data it responds with another ACKnowledge. The master

then terminates the transfer by generating a STOP condi-

tion, at which time the SMS1242 begins the internal write

cycle. While the internal write cycle is in progress the

SMS1242 inputs are disabled and the device will not

respond to any requests from the master.

The SMS1242 will respond with an ACKnowledge after

recognition of a START condition and its slave address

byte. If both the device and a write operation are selected,

the SMS1242 will respond with an ACKnowledge after the

receipt of each subsequent 8-bit word. In the READ mode

the SMS1242 transmits eight bits of data, then releases

the SDA line, and monitors the line for an ACKnowledge

signal. If an ACKnowledge is detected and no STOP

condition is generated by the master, the SMS1242 will

continue to transmit data. If an ACKnowledge is not

detected the SMS1242 will terminate further data trans-

missions and await a STOP condition before returning to

the standby power mode.

Page Write

The SMS1242 is capable of a 16-byte page write opera-

tion. It is initiated in the same manner as the byte-write

operation, but instead of terminating the write cycle after

the first data word the master can transmit up to 15 more

bytes of data. After the receipt of each byte the SMS1242

will respond with an ACKnowledge.

The SMS1242 automatically increments the address for

subsequent data words. After the receipt of each word, the

low order address bits are internally incremented by one.

The high order bits of the address byte remain constant.

2038 2.0 6/8/00

SUMMIT MICROELECTRONICS, Inc.

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