SMS1242S-C データシートの表示（PDF） - Summit Microelectronics
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コンポーネント説明
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SMS1242S-C
Summit Microelectronics
SMS1242S-C Datasheet PDF : 11 Pages
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SMS1242
MEMORY OPERATION (Continued)
Should the master transmit more than 16 bytes, prior to
generating the STOP condition, the address counter will
“roll over” and the previously written data will be overwrit-
ten. As with the byte-write operation, all inputs are
disabled during the internal write cycle. Refer to Figure 8
for the address, ACKnowledge and data transfer se-
quence.
Acknowledge Polling
When the SMS1242 is performing an internal WRITE
operation it will ignore any new START conditions. Since
the device will only return an acknowledge after it accepts
the START, the part can be continuously queried until an
acknowledge is issued, indicating that the internal WRITE
cycle is complete. See the flow diagram for the proper
sequence of operations for polling.
READ OPERATIONS
Read operations are initiated with the R/W bit of the
identification field set to “1.” There are two different read
options:
1. Current Address Byte Read
2. Random Address Byte Read
Current Address Read
The SMS1242 contains an internal address counter which
maintains the address of the last word accessed, incre-
mented by one. If the last address accessed (either a read
Write Cycle
In Progress
Issue Start
Issue Slave
Address and
R/W = 0
Issue Stop
ACK
No
Returned
Yes
Next
Operation
a Write?
Yes
Issue
Address
No
Issue Stop
Proceed
With
Write
Await
Next
Command
2038 Flow01 2.0
S
T
A
Master
R
T
SDA
Slave
S
T
Master
A
R
T
SDA
Slave
8
Typical Write Operation
A
1
0
A
9
A
8
R
/
W
AA A A A A A A
76 5 4 3 2 1 0
DDDDDDDD
76543210
DD
76
A
A
A
C
C
C
K
K
K
Typical Read Operation
R
XX
X
/
W
A
A
C
C
K
K
DDDDDDDD DDDDDDDD DD
76543210 76543210 76
A
C
K
Figure 8. Memory Operation
SUMMIT MICROELECTRONICS, Inc.
S
T
O
P
DD
10
A
C
K
S
T
O
P
DD
10
2038 T Fig08 2.0
2038 2.0 6/8/00
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