HFA1245(1999) データシートの表示（PDF） - Intersil

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HFA1245
(Rev.:1999)

Dual, 420MHz, Low Power, Video, Current Feedback Operational Amplifier with Disable

Intersil 

HFA1245

Application Information

Relevant Application Notes

The following Application Notes pertain to the HFA1245:

• AN9787-An Intuitive Approach to Understanding

Current Feedback Amplifiers

• AN9420-Current Feedback Amplifier Theory and

Applications

• AN9663-Converting from Voltage Feedback to Current

Feedback Amplifiers

These publications may be obtained from Intersil’s web site

(http://www.intersil.com) or via our AnswerFAX system.

Optimum Feedback Resistor

Although a current feedback amplifier’s bandwidth

dependency on closed loop gain isn’t as severe as that of a

voltage feedback amplifier, there can be an appreciable

decrease in bandwidth at higher gains. This decrease may

be minimized by taking advantage of the current feedback

amplifier’s unique relationship between bandwidth and RF.

All current feedback amplifiers require a feedback resistor,

even for unity gain applications, and RF, in conjunction with

the internal compensation capacitor, sets the dominant pole

of the frequency response. Thus, the amplifier’s bandwidth is

inversely proportional to RF. The HFA1245 design is

optimized for a 750Ω RF at a gain of +2. Decreasing RF

decreases stability, resulting in excessive peaking and

overshoot (Note: Capacitive feedback will cause the same

problems due to the feedback impedance decrease at higher

frequencies). At higher gains the amplifier is more stable, so

RF can be decreased in a trade-off of stability for bandwidth.

The table below lists recommended RF values for various

gains, and the expected bandwidth. For good channel-to-

channel gain matching, it is recommended that all resistors

(termination as well as gain setting) be ±1% tolerance or

better. Note that a series input resistor, on +IN, is required for

a gain of +1, to reduce gain peaking and increase stability.

TABLE 1. OPTIMUM FEEDBACK RESISTOR

GAIN

(AV)

-1

RF (Ω)

475

BANDWIDTH

(MHz)

280

+1

560 (+RS = 650Ω)

260

+2

750

420

+5

200

270

+10

180

140

Channel-To-Channel Frequency Response Matching

The frequency response of channel 1 and channel 2 aren’t

perfectly matched. For the best channel-to-channel

frequency response match in a gain of 2 (see Figure 1), use

RF = 650Ω for channel 1 and RF = 806Ω for channel 2.

5

AV = +2

2

1

RF = 806Ω, CH2

0

-1

-2

RF = 650Ω, CH1

-3

-4

1

10

100

FREQUENCY (MHz)

FIGURE 1. CHANNEL 1 AND CHANNEL 2 MATCHED

FREQUENCY RESPONSE

1000

Non-inverting Input Source Impedance

For best operation, the DC source impedance seen by the

non-inverting input should be ≥50Ω. This is especially

important in inverting gain configurations where the

non-inverting input would normally be connected directly to

GND.

Pulse Undershoot and Asymmetrical Slew Rates

The HFA1245 utilizes a quasi-complementary output stage

to achieve high output current while minimizing quiescent

supply current. In this approach, a composite device

replaces the traditional PNP pulldown transistor. The

composite device switches modes after crossing 0V,

resulting in added distortion for signals swinging below

ground, and an increased undershoot on the negative

portion of the output waveform (see Figures 7, 11, 15, and

19). This undershoot isn’t present for small bipolar signals,

or large positive signals. Another artifact of the composite

device is asymmetrical slew rates for output signals with a

negative voltage component. The slew rate degrades as the

output signal crosses through 0V (see Figures 7, 11, 15, and

19), resulting in a slower overall negative slew rate. Positive

only signals have symmetrical slew rates as illustrated in the

large signal positive pulse response graphs (see Figures 5,

9, 13, and 17).

DISABLE Input TTL Compatibility

The HFA1245 derives an internal GND reference for the

digital circuitry as long as the power supplies are symmetrical

about GND. With symmetrical supplies the digital switching

threshold (VTH = (VIH + VIL)/2 = (2.0 + 0.8)/2) is 1.4V, which

ensures the TTL compatibility of the DISABLE input. If

asymmetrical supplies (e.g., +10V, 0V) are utilized, the

switching threshold becomes:

VTH = V-----+----2-+----V------ + 1.4V,

and the VIH and VIL levels will be VTH ±0.6V, respectively.

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