LZ2326AR データシートの表示（PDF） - Sharp Electronics

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LZ2326AR

Dual-power-supply (5 V/12 V) Operation 1/3-type CCD Area Sensors with 320 k Pixels

Sharp Electronics 

LZ2325A/LZ2326AR

PIN DESCRIPTION

SYMBOL

PIN NAME

NOTE

RD

Reset transistor drain

OD

Output transistor drain

OS

Output signals

ØRS

Reset transistor clock

1

ØV1, ØV2, ØV3, ØV4

Vertical shift register clock

2

ØH1, ØH2, ØH1B, ØH2B

Horizontal shift register clock

ØTG

Transfer gate clock

3

OFD

Overflow drain

1

GND

Ground

T1

Test pin

NOTES :

1. ØRS, OFD : Use the circuit parameter indicated in "SYSTEM CONFIGURATION

EXAMPLE", and do not connect to DC voltage directly. When not using electronic shutter,

connect OFD to GND through a 0.1 µF capacitor and a 1 M$ resistor.

2. ØV1-ØV4 : Input the clock through a 0.1 µF capacitor.

3. ØTG : Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE".

ABSOLUTE MAXIMUM RATINGS

(TA = +25 ˚C)

PARAMETER

SYMBOL

RATING

UNIT NOTE

Output transistor drain voltage

VOD

0 to +15

V

Reset transistor drain voltage

VRD

0 to +15

V

Overflow drain voltage

VOFD

Internal output

V

1

Test pin, T1

VT1

0 to +15

V

Reset gate clock voltage

VØRS

Internal output

V

2

Vertical shift register clock voltage

VØV

0 to +7.5

V

Horizontal shift register clock voltage

VØH

–0.3 to +7.5

V

Transfer gate clock voltage

VØTG

–0.3 to +15

V

Storage temperature

TSTG

–40 to +85

˚C

Ambient operating temperature

TOPR

–20 to +70

˚C

NOTES :

1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is

applied below 13 Vp-p.

2. Do not connect to DC voltage directly. When ØRS is connected to GND, connect VOD to GND. Reset gate clock is

applied below 8 Vp-p.

2

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