LC75421 データシートの表示（PDF） - SANYO -> Panasonic
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LC75421 Datasheet PDF : 24 Pages
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LC75421M
Control Timing and Data Format
To control the LC75421M, input specified serial data to the CE, CL, and DI pins.
The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits.
CE
DI B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5
CL
CE
1 µs 1 µs 1 µs
min min min
1 µs
min
CL
D38 D39 D40 D41 D42 D43
1 µs
min
DI
BBBBAAAA
01230123
1 µs ≤ TDEST
10000001
Address code
DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
Fader step control
0 0 0 0 –∞ dB
1 0 0 0 –60 dB
0 1 0 0 –45 dB
1 1 0 0 –35 dB
0 0 1 0 –25 dB
1 0 1 0 –20 dB
0 1 1 0 –18 dB
1 1 1 0 –16 dB
0 0 0 1 –14 dB
1 0 0 1 –12 dB
0 1 0 1 –10 dB
1 1 0 1 –8 dB
0 0 1 1 –6 dB
1 0 1 1 –4 dB
0 1 1 1 –2 dB
1 1 1 1 0 dB
Bass control
Boost
1 1 1 0 STEP15
0 1 1 0 STEP14
1 0 1 0 STEP13
0 0 1 0 STEP12
1 1 0 0 STEP11
0 1 0 0 STEP10
1 0 0 0 STEP9
0 0 0 0 STEP8
1 0 0 1 STEP7
0 1 0 1 STEP6
1 1 0 1 STEP5
0 0 1 1 STEP4
1 0 1 1 STEP3
0 1 1 1 STEP2
1 1 1 1 STEP1
Cut
Treble control
Boost
Super bass control
1 1 1 0 STEP15
0 1 1 0 STEP14
0 0 0 0 STEP0(FLAT)
1 0 1 0 STEP13
1 0 0 0 STEP1
0 0 1 0 STEP12
0 1 0 0 STEP2
1 1 0 0 STEP11
1 1 0 0 STEP3
0 1 0 0 STEP10
0 0 1 0 STEP4
1 0 0 0 STEP9
1 0 1 0 STEP5
0 0 0 0 STEP8
0 1 1 0 STEP6
1 0 0 1 STEP7
1 1 1 0 STEP7
0 1 0 1 STEP6
0 0 0 1 STEP8
1 1 0 1 STEP5
1 0 0 1 STEP9
0 0 1 1 STEP4
0 1 0 1 STEP10(BOOST max) 1 0 1 1 STEP3
0 1 1 1 STEP2
1 1 1 1 STEP1
Cut
Volume control
Fader
rear/front
control
0 Rear
1 Front
Input switch control (1)
Input switch control (2)
Input mute
switch control
0 OFF
1 ON
TEST mode
Input gain control
00 0 0
0 dB
1 0 0 0 +1.25 dB
0 1 0 0 +2.50 dB
1 1 0 0 +3.75 dB
0 0 1 0 +5.00 dB
1 0 1 0 +6.25 dB
0 1 1 0 +7.50 dB
1 1 1 0 +8.75 dB
0 0 0 1 +10.00 dB
1 0 0 1 +11.25 dB
0 1 0 1 +12.50 dB
1 1 0 1 +13.75 dB
0 0 1 1 +15.00 dB
1 0 1 1 +16.25 dB
0 1 1 1 +17.50 dB
1 1 1 1 +18.75 dB
Channel selection
0 0 Initial setting
1 0 Lch
0 1 Rch
1 1 L/R simultaneous
Output gain control
0 0 0 dB
0 1 0 dB
1 0 +6.5 dB
1 1 +8.5 dB
Caution: Be sure to set D36 to D38 and D40 to D43
to “0” for the TEST bit of the IC.
No. 6866-6/24
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