PT2258 データシートの表示（PDF） - Princeton Technology

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PT2258

6-Channel Electronic Volume Controller IC

Princeton Technology 

6-Channel Electronic Volume Controller IC

Tel: 886-2-66296288

Fax: 886-2-29174598

URL: http://www.princeton.com.tw

PT2258

ACKNOWLEDGE

During the Acknowledge Clock Pulse, the master (µP) puts a resistive HIGH level on the SDA Line.

The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the

Acknowledge Clock Pulse so that the SDA Line is in a Stable Low State during this Clock Pulse.

Please refer to the diagram below.

The audio processor that has been addressed has to generate an Acknowledge after receiving each

byte, otherwise, the SDA Line will remain at the High Level during the ninth (9th) Clock Pulse. In this

case, the master transmitter can generate the STOP Information in order to abort the transfer.

CLK

1

2

3

4

7

8

9

DATA

Start

MSB

A cknowledgment

from R eceiver

TRANSMISSION WITHOUT ACKNOWLEDGE

If you want to avoid the acknowledge detection of the audio processor, a simpler µP transmission may

be used. Wait one clock and do not check the slave acknowledge of this same clock then send the new

data. If you use this approach, there are greater chances of faulty operation as well as decrease in

noise immunity.

INTERFACE PROTOCOL

The interface protocol consists of the following:

• A Start bit

• A Chip Address Byte

• ACK=Acknowledge bit

• A Data byte

• A Stop bit

Please refer to the diagram below:

PT2258 ADD RESS

MSB FIRST BYTE LSB MSB

S TA RT 1 0 0 0 1 0 0 0 A CK

DATA

LSB MSB

ACK

DATA

LSB

ACK STOP

DATA TRANSMITTED (N-BYTES + ACKNOW LEDGE)

Notes:

1. ACK=Acknowledge

2. Max. Clock Speed=100K Bits/s

PT2258 V1.2

-6-

July, 2005

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