74ABT16240ADGG,512 データシートの表示（PDF） - NXP Semiconductors.
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74ABT16240ADGG,512 Datasheet PDF : 14 Pages
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Nexperia
12. Test information
74ABT16240A
16-bit inverting buffer/line driver; 3-state
VI
negative
pulse
0V
VI
positive
pulse
0V
90 %
10 %
VM
10 %
tf
tr
90 %
VM
VM = 1.5 V
a. Input pulse definition
tW
90 %
VM
10 %
tr
tf
90 %
VM
10 %
tW
001aai298
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
VEXT
RL
CL RL
001aac764
Test data is given in Table 8.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
b. Test circuit for 3-state outputs
Fig 6. Load circuitry for switching times
Table 8.
Input
VI
3.0 V
Test data
fi
1 MHz
tW
500 ns
tr, tf
2.5 ns
Load
CL
50 pF
RL
500
VEXT
tPHZ, tPZH
open
tPLZ, tPZL
7.0 V
tPLH, tPHL
open
74ABT16240A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 3 November 2011
© Nexperia B.V. 2017. All rights reserved
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