74LVC821AD データシートの表示（PDF） - Unspecified
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74LVC821AD Datasheet PDF : 20 Pages
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Philips Semiconductors
74LVC821A
10-bit D-type flip-flop with 5 V tolerant inputs/outputs
Table 3:
Symbol
GND
CP
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
VCC
Pin description …continued
Pin
Description
12
ground (0 V)
13
clock input (LOW-to-HIGH, edge-triggered)
14
3-state flip-flop output
15
3-state flip-flop output
16
3-state flip-flop output
17
3-state flip-flop output
18
3-state flip-flop output
19
3-state flip-flop output
20
3-state flip-flop output
21
3-state flip-flop output
22
3-state flip-flop output
23
3-state flip-flop output
24
supply voltage
7. Functional description
Table 4: Function table [1]
Operating mode
Load and read register
Load register and disable outputs
Hold
Input
OE
L
L
H
H
L
CP
Dn
↑
I
↑
h
↑
I
↑
h
H or L
X
Internal
flip-flops
L
H
L
H
NC
Output
Qn
L
H
Z
Z
NC
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
Z = high-impedance OFF-state;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
NC = no change;
X = don’t care.
8. Limiting values
9397 750 13276
Product data sheet
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max
Unit
VCC
supply voltage
−0.5 +6.5
V
IIK
input diode current
VI < 0 V
-
−50
mA
VI
input voltage
[1] −0.5 +6.5
V
IOK
output diode current
VO > VCC or VO < 0 V
-
±50
mA
Rev. 03 — 11 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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