A64E06161(2004) データシートの表示（PDF） - AMIC Technology

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A64E06161
(Rev.:2004)

1M X 16 Bit Low Voltage Super RAM

AMIC Technology 

Block Diagram

A0

A18

A19

DECODER

I/O0

INPUT

DATA

CIRCUIT

I/O7

16,777,216

MEMORY ARRAY

COLUMN I/O

VCC

VSS

VCCQ

VSSQ

INPUT

DATA

CIRCUIT

CE

ZZ

LB

CONTROL

HB

CIRCUIT

OE

WE

Pin Description

Symbol

A0 - A19

CE

ZZ

I/O0 - I/O15

WE

LB

HB

OE

VCC

VSS

VCCQ

VSSQ

NC

Description

Address Inputs

Chip Enable Input

Sleep Enable Input

(When ZZ is low, the CR register can be

loaded or the device can enter DPD mode or

PAR mode).

Data Input/Outputs

Write Enable Input

Byte Enable Input (I/O0 to I/O7)

Byte Enable Input (I/O8 to I/O15)

Output Enable Input

Power

Ground

Provide isolated power to I/O for improved

noise immunity

Provide isolated / Ground to I/O for improved

noise immunity

No Connection or VSSQ

A64E06161

I/O8

I/O15

PRELIMINARY (November, 2004, Version 0.1)

2

AMIC Technology, Corp.

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