ASM1832SF データシートの表示（PDF） - Alliance Semiconductor

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ASM1832SF

3.3V µP Power Supply Monitor and Reset Circuit

Alliance Semiconductor 

February 2005

ASM1832

rev 1.5

signals. The pushbutton input is debounced and is pulled

HIGH through an internal 40kΩ resistor.

When PBRST is held LOW for the minimum time tPB, both

resets become active and remain active for a minimum time

period of 250ms after PBRST returns HIGH.

The debounced input is guaranteed to recognize pulses

greater than 20ms. No external pull-up resistor is required,

since PBRST is pulled HIGH by an internal 40kΩ resistor.

The PBRST can be driven from a TTL or CMOS logic line or

shorted to ground with a mechanical switch.

minimum timeout period, reset signals become active. On

power-up after the supply voltage returns to an in-tolerance

condition, the reset signal remains active for 250ms

minimum, allowing the power supply and system

microprocessor to stabilize.

ST Pulses as short as 20ns can be detected.

ST

tRST

Valid

Strobe

Valid

Strobe

Invalid

Strobe

tST

tTD (min)

tTD (max)

PBRST

tPB

tPDLY

VIL

RESET

RESET

VIH

tRST

VOH

VOL

RESET

Note: ST is ignored whenever a reset is active

Figure 5: Timing Diagram: Strobe Input

Timeouts periods of approximately 150ms, 610ms or

1,200ms are selected through the TD pin.

TD Voltage level

Watchdog Time-out Period

(ms)

Min

Nom

Max

Figure 3: Timing Diagram: Pushbutton Reset

GND

Floating

62.5

150

250

250

610

1000

Supply

Voltage

ASM1832

1

PBRST

2

TD

VCC 8

ST 7

3

6

TOL RESET

4

GND

5

RESET

I/O

µP

RESET

Figure 4: Application Circuit: Pushbutton Reset

Watchdog Timer and ST Input

A watchdog timer stops and restarts a microprocessor that is

“hung-up”. The µP must toggle the ST input within a set

period (as selectable through TD input) to verify proper

software execution. If the ST is not toggled low within the

VCC

500

1200

2000

The watchdog timer can not be disabled. It must be strobed

with a high-to-low transition to avoid watchdog timeout and

reset.

Supply

Voltage

ASM1832

1

PBRST

2

TD

VCC 8

ST 7

3

6

TOL RESET

4

GND

5

RESET

MREQ

µP

RESET

Decoder

Address

Bus

Figure 6: Application Circuit: Watchdog Timer

3.3V µP Power Supply Monitor and Reset Circuit

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Notice: The information in this document is subject to change without notice

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