LT1122DS8_TRPBF データシートの表示（PDF） - Linear Technology

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LT1122DS8_TRPBF

Fast Settling, JFET Input Operational Amplifier

Linear Technology 

LT1122

APPLICATIONS INFORMATION

Settling Time Measurements

Settling time test circuits shown on some competitive

devices’ data sheets require:

1. A “flat top” pulse generator. Unfortunately, flat top pulse

generators are not commercially available.

2. A variable feedback capacitor around the device under

test. This capacitor varies over a four-to-one range.

Presumably, as each op amp is measured for settling

time, the capacitor is fine tuned to optimize settling

time for that particular device.

3. A small inductor load to optimize settling.

The LT1122’s settling time is 100% tested in the test circuit

shown. No “flat top” pulse generator is required. The test

circuit can be readily constructed, using commercially

available ICs. Of course, standard high frequency board

construction techniques should be followed. All LT1122s

are measured with a constant feedback capacitor. No fine

tuning is required.

Speed Boost/Overcompensation Terminal

Pin 8 of the LT1122 can be used to change the input stage

operating current of the device. Shorting Pin 8 to the posi-

tive supply (Pin 7) increases slew rate and bandwidth by

about 25%, but at the expense of a reduction in phase

margin by approximately 18 degrees. Unity-gain capacitive

load handling decreases from typically 500pF to 100pF.

Conversely, connecting a 15k resistor from Pin 8 to ground

pulls 1mA out of Pin 8 (with V+ = 15V). This reduces slew

rate and bandwidth by 25%. Phase margin and capacitive

load handling improve; the latter typically increasing to

800pF.

High Speed Operation

As with most high speed amplifiers, care should be

taken with supply decoupling, lead dress and component

placement.

The power supply connections to the LT1122 must maintain

a low impedance to ground over a bandwidth of 20MHz.

This is especially important when driving a significant

resistive or capacitive load, since all current delivered to

the load comes from the power supplies. Multiple high

quality bypass capacitors are recommended for each power

supply line in any critical application. A 0.1µF ceramic and

a 1µF electrolytic capacitor, as shown, placed as close as

possible to the amplifier (with short lead lengths to power

supply common) will assure adequate high frequency

bypassing, in most applications.

V+

7

2–

LT1122

3+

4

+

1µF

6

0.1µF

1µF

0.1µF

V–

1122 TA03

When the feedback around the op amp is resistive (RF),

a pole will be created with RF, the source resistance and

capacitance (RS, CS), and the amplifier input capacitance

(CIN ≈ 4pF). In low closed-loop gain configurations and

with RS and RF in the kilohm range, this pole can create

excess phase shift and even oscillation. A small capaci-

tor (CF) in parallel with RF eliminates this problem. With

RS (CS + CIN) = RFCF, the effect of the feedback pole is

completely removed.

CF

RS

CS

RF

–

CIN

+

OUTPUT

1122 TA04

1122fb

8

For more information www.linear.com/LT1122

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