HDMP-1546 データシートの表示（PDF） - HP => Agilent Technologies

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HDMP-1546

Fibre Channel Transceiver Chip

HP => Agilent Technologies 

HDMP-1536/46 (Transmitter Section)

Timing Characteristics

TA[1] = 0°C to +60°C, VCC = 3.15 V to 3.45 V

Symbol

Parameter

tsetup

Setup Time

thold

t_txlat[2]

Hold Time

Transmitter Latency

Units

nsec

nsec

nsec

bits

Min.

2

1.5

Typ.

7.5

8.0

Max.

Notes:

1. Device tested and characterized under TA conditions specified, with TC monitored at approximately 20° higher than TA.

2. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered

by the rising edge of the transmit byte clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by

the rising edge of the first bit transmitted).

,

,
,
,
,
,
,
 REFCLK

TX[0]-TX[9]

DATA

DATA

DATA

DATA

DATA

1.4 V

2.0 V

0.8 V

tsetup

thold

Figure 3. Transmitter Section Timing.

,
,
 ,
,
 DATABYTEA

DATA BYTE B

± DOUT T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T0 T1 T2 T3 T4 T5

t_txlat

TX[0]-TX[9]

DATA BYTE B

DATA BYTE C

REFCLK

1.4 V

Figure 4. Transmitter Latency.

700

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