DS28E01-100 データシートの表示（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS28E01-100

1K-Bit Protected 1-Wire EEPROM with SHA-1 Engine

Dallas Semiconductor -> Maxim Integrated 

Abridged Data Sheet

DS28E01-100

ADDRESS REGISTERS AND TRANSFER STATUS

The DS28E01-100 employs three address registers: TA1, TA2, and E/S (Figure 7). These registers are common to

many other 1-Wire devices but operate slightly differently with the DS28E01-100. Registers TA1 and TA2 must be

loaded with the target address to which the data is written or from which data is read. Register E/S is a read-only

transfer-status register, used to verify data integrity with write commands. Since the scratchpad of the DS28E01-

100 is designed to accept data in blocks of eight bytes only, the lower three bits of TA1 are forced to 0 and the

lower three bits of the E/S register (ending offset) always read 1. This indicates that all the data in the scratchpad is

used for a subsequent copying into main memory or secret. Bit 5 of the E/S register, called PF or partial byte flag,

is a logic-1 if the number of data bits sent by the master is not an integer multiple of eight or if the data in the

scratchpad is not valid due to a loss of power. A valid write to the scratchpad clears the PF bit. Bits 3, 4, and 6

have no function; they always read 1. The partial flag supports the master checking the data integrity after a write

command. The highest valued bit of the E/S register is called the AA or authorization accepted flag, which indicates

that the data stored in the scratchpad has already been copied to the target memory address. Writing data to the

scratchpad clears this flag.

Figure 7. Address Registers

Bit # 7

6

5

4

3

2

1

0

Target Address (TA1) T7

T6

T5

T4

T3

T2

(0)

T1

(0)

T0

(0)

Target Address (TA2) T15 T14 T13 T12 T11 T10 T9 T8

Ending Address with

Data Status (E/S) AA

1

PF

1

(Read Only)

1

E2 E1 E0

(1) (1) (1)

WRITING WITH VERIFICATION

To write data to the DS28E01-100, the scratchpad has to be used as intermediate storage. First the master issues

the write scratchpad command, which specifies the desired target address and the data to be written to the scratch-

pad. Note that writes to data memory must be performed on 8-byte boundaries with the three LSBs of the target

address T2–T0 equal to 000b. Therefore, if T2–T0 are sent with non-zero values, the device sets these bits to zero

and uses the modified address as the target address. The master should always send eight complete data bytes.

After the eight bytes of data have been transmitted, the master can elect to receive an inverted CRC16 of the write

scratchpad command, the address as sent by the master, and the data as sent by the master. The master can

compare the CRC to the value it has calculated itself in order to determine if the communication was successful.

After the scratchpad has been written, the master should always perform a read scratchpad to verify that the

intended data was in fact written. During a read scratchpad, the DS28E01-100 repeats the target address TA1 and

TA2 and sends the contents of the E/S register. The partial flag (bit 5 of the E/S register) is set to 1 if the last data

byte the DS28E01-100 received during a write scratchpad or refresh scratchpad command was incomplete, or if

there was a loss of power since data was last written to the scratchpad. The authorization-accepted (AA) flag (bit 7

of the E/S register) is normally cleared by a write scratchpad or refresh scratchpad; therefore, if it is set to 1, it indi-

cates that the DS28E01-100 did not understand the proceeding write (or refresh) scratchpad command. In either of

these cases, the master should rewrite the scratchpad. After the master receives the E/S register, the scratchpad

data is received. The descriptions of write scratchpad and refresh scratchpad provide clarification of what changes

can occur to the scratchpad data under certain conditions. An inverted CRC of the read scratchpad command, tar-

get address, E/S register, and scratchpad data follows the scratchpad data. As with the write scratchpad command,

this CRC can be compared to the value the master has calculated itself in order to determine if the communication

was successful. After the master has verified the data, it can send the copy scratchpad to copy the scratchpad to

memory. Alternatively, the load first secret or compute next secret command can be issued to change the secret.

See the descriptions of these commands for more information.

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