EB201 データシートの表示（PDF） - ON Semiconductor
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EB201 Datasheet PDF : 8 Pages
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EB201/D
VGS
5 V/DIV
0
MTP75N05HD
ID
10 A/DIV
VDS
10 V/DIV
0
0
200 ns/DIV
Figure 8. MTP75N05HD Clamped Inductive Turn–Off
VGS
5 V/DIV
MTP50N05E
0
ID
10 A/DIV
VDS
10 V/DIV
0
0
200 ns/DIV
Figure 9. MTP50N05E Clamped Inductive Turn–Off
On–Resistance/Die Size Tradeoffs
When replacing an existing MOSFET with a high cell
density device with the same on–resistance, designers must
consider the implications of using a smaller die size. Since
the die size is cut by a factor of 40 to 50%, pulsed energy
capability will be affected. The ability to handle energy
transients such as overvoltage transients or fault currents is
to the first order proportional to die area. Therefore, for a
given on–resistance standard devices are inherently more
robust.
The smaller die size of HDTMOS may affect the system’s
thermal performance, but that depends on the system’s
thermal profile. Compared to a standard cell MOSFET, a
high cell density MOSFET will have around twice the
junction–to–case thermal resistance. That difference is in
the range of 0.5 to 1.5°C/W. If the system’s total junction to
ambient thermal resistance (RΘJA) is very good, less than
5°C/W for example, then the added thermal resistance will
alter the junction temperature significantly. If the junction to
ambient thermal resistance is very high, 50°C/W for
example, as it might be in a surface mount application, then
the added junction–to–case thermal resistance is not a
problem. These thermal issues reinforce the perception that
the best use of high cell density MOSFETs is in new, higher
current devices and in surface mount applications where the
objective is to avoid generating heat.
Best Uses of High Cell Density MOSFETs
Designers are considering using high cell density
technology in many applications. The need for an improved
power transistor usually centers around a new and difficult
design goal such as reducing module size while maintaining
or increasing functionality. The need for lower voltage drop
(to ensure that maximum voltage appears at the load) or
higher efficiency are other common reasons cited for using
very low on–resistance MOSFETs. Cutting costs is another
reason for using HDTMOS. Costs can be cut if the power
transistor can be housed in a simpler package or if the
module’s packaging or assembly can be simplified. For
example, HDTMOS may allow using all surface mount
components, or a heatsink may be able to be downsized or
removed.
Specific applications for HDTMOS include motor
control, solid state relays, battery operated equipment such
as laptop computers or cordless tools, synchronous rectifiers
for power conversion, and replacement of ORing diodes in
computer systems.
Cost
The advent of a new technology does not bring
widespread use unless it is cost effective, so high cell density
devices must be competitive with standard power
MOSFETs. Compared on a cost per ampere basis, high cell
density devices fair well. Since there are no major cost
savings in replacing standard MOSFETs that already have a
small die size, and due to the problems associated with
switching from a standard to a high cell density device, the
HDTMOS product family will focus on lower
on–resistances that are currently not available in standard
technology. Next, HDTMOS will be used to replace
standard devices which require large die area such as the
MTP50N06E. Current plans are to offer HDTMOS
replacements for on–resistances up to 40 mΩ.
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