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EN5360 データシートの表示(PDF) - Unspecified

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EN5360 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Rev 1.0 – July 2005
EN5360
output filter capacitors relative to their respective pins
is very critical. The input capacitors should be placed
such that they have the lowest inductance traces to
PVIN and PGND pins 28-33. The output filter
capacitors should have the lowest inductance traces to
VOUT and PGND pins 10-15.
There are two thermal pads underneath the device.
The centrally located pad is PGND, and, depending on
the number of layers of the PC board, it needs to be
connected to a thermal plane in order to conduct heat
away from the device. Note that if any of the thermal
planes is also connected to AGND, the impedance
between this point and the GND connection of the
Packaging Information
Mechanical Drawing and Nominal Dimensions
load needs to be minimized in order to get the best
possible load regulation. The pad in front of the VOUT
pins 22-24 is connected to VOUT. This VOUT pad
should be connected to a top layer copper area as large
as possible to conduct more heat away from the
package. This will also help minimize the trace
inductance to the output filter caps.
Pin 17 is a connected to a noisy internal node and is
brought out for test purposes only. Keep all sensitive
signal traces as far as possible from this pin. In order
to minimize cross-talk to other parts of the board, do
not run any unrelated traces from other circuits
underneath the EN5360.
Bottom View
10
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