ID246PXX データシートの表示（PDF） - Sharp Electronics

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ID246PXX

Flash Memory Card

Sharp Electronics 

SHARP

ID246 SERIES PRODUCT OVERVIEW

13

Table 7(a). Status Register Definition

WSMS

7

BESS 1 ECBLBS 1 WSBLBS

6

5

4

SR.7 = WRITE STATE MACHINE STATUS

1 = Ready

0 = Busy

SR.6 = BLOCK ERASE SUSPEND STATUS

1 = Block Erase Suspended

0 = Block Erase in Progress/Completed

SR.5 = ERASE AND CLEAR BLOCK LOCK-BITS

STATUS

1 = Error in Erase or Clear Block Lock-Bits

0 = Successful Erase or Clear Block Lock-Bit

5R.4 = WRITE AND SET BLOCK LOCK-BIT STATUS

1 = Error in Write or Set Block Lock-Bit

0 = Successful Write or Set Block Lock-Bit

SR.3 = VP? STATUS

1 = VPP Low Detect, Operation Abort

0 = VPP OK

3R.2 = WRITE SUSPEND STATUS

1 = Write Suspended

0 = Write in Progress/Completed

jR. 1 = DEVICE PROTECT STATUS

1 = Block Lock-Bit and/or WP# Lock Detected,

Operation Abort

0 = Unlock

3R.0 = RESERVED FOR FUTURJZ ENHANCEMENTS

VPPS

wss

3

2

NOTES:

DPS

R

1

0

Check RY/BY# pin or SR.7 to determine block erase, full

chip erase, (multi) word/byte write or block lock-bit

configuration completion.

SR.6-0 are invalid while SR.7=“0”

If both SR.5 and SR.4 are “1”safter a block erase. full chip

erase,(multi) word/bite write, block lock-bit configuration or

STS configuration attempt, an improper command sequence

was entered.

SR.3 does not provide a continuous indication of VPP

level. the WSM interrogates and indicates the VPP level only

after block erase, full chip erase, (multi) word/byte write or

block lock-bit configuration command sequences. SR.3 is

not guaranteed to reports accurate feedback only when

vPPi=vPPn 1.

SR. 1 does not provide a continuous indication of block

lock-bit values. The WSM interrogates block lock-bit, and

WP# only after block erase, full chip erase, (multi)

word/byte write or block lock-bit configuration command

sequences. Itinforms the system, depending on the

attempted operation, If the block lock-bit is set and/or WP#

is not VIH. Reading the block lock configuration codes after

writing the Read Identifier Codes command indicates block

lock-bit status.

SR.0 is reserved for future use and should be masked out

when polling the status register.

TllfnC~n,

7

6

5

4

XSR.7 = STATE hlACHINE STATUS

1= Multi Word/byte Write available

0 = Multi Word/byte Write not available

XSR.QO=RESERVED FOR FUTURE ENHANCEMENTS

3

2

NOTES:

1

0

After issue a Multi Word/Byte Write command: XSR.7

indicates that a next Multi Word/Byte Write command is

available.

XSR.B-0 is reserved for future use and should be masked

out when oolline the extended status register.

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