Q67100-Q1086 データシートの表示（PDF） - Siemens AG

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Q67100-Q1086

4M × 4-Bit Dynamic RAM 2k & 4k Refresh (Fast Page Mode)

Siemens AG 

HYB 5116(7)400BJ-50/-60

HYB 3116(7)400BJ/BT-50/-60

4M × 4 DRAM

DC Characteristics (cont’d)

TA = 0 to 70 °C, VSS = 0 V, tT = 2 ns

Parameter

Symbol Limit Values Unit Notes

min. max.

2k 4k

Common Parameters

Input leakage current

II(L)

(0 V ≤ VIH ≤ VCC + 0.3 V, all other pins = 0 V)

Output leakage current

IO(L)

(DO is disabled, 0 V ≤ VOUT ≤ VCC + 0.3 V)

Average VCC supply current

ICC1

-50 ns version

-60 ns version

(RAS, CAS, address cycling: tRC = tRC MIN.)

Standby VCC supply current (RAS = CAS = VIH)

ICC2

Average VCC supply current, during RAS-only refresh ICC3

cycles

-50 ns version

-60 ns version

(RAS cycling, CAS = VIH, tRC = tRC MIN.)

Average VCC supply current,during fast page mode ICC4

-50 ns version

-60 ns version

(RAS = VIL, CAS, address cycling: tPC = tPC MIN.)

Standby VCC supply current

ICC5

(RAS = CAS = VCC – 0.2 V)

Average VCC supply current, during CAS-before-RAS ICC6

refresh mode

-50 ns version

-60 ns version

(RAS, CAS cycling: tRC = tRC MIN.)

– 10 10 µA 1

– 10 10 µA 1

– 80 50 mA 2, 3, 4

– 70 40 mA 2, 3, 4

–

2 mA –

– 80 50 mA 2, 4

– 70 40 mA 2, 4

–

25

mA 2, 3, 4

–

20

mA 2, 3, 4

–

1 mA 1

– 80 50 mA 2, 4

– 70 40 mA 2, 4

Semiconductor Group

7

1998-10-01

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