Q67100-Q2178 データシートの表示（PDF） - Siemens AG
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Q67100-Q2178 Datasheet PDF : 14 Pages
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HYM 64(72)V1005GU-50/-60
1M x 64/72 DRAM Module
AC Characteristics 5)6)
TA = 0 to 70 °C,VCC = 3.3 V ± 0.3 V, tT = 2 ns
Parameter
Symbol
Limit Values
-50
-60
min. max. min. max.
common parameters
Random read or write cycle time
RAS precharge time
RAS pulse width
CAS pulse width
Row address setup time
Row address hold time
Column address setup time
Column address hold time
RAS to CAS delay time
RAS to column address delay
RAS hold time
CAS hold time
CAS to RAS precharge time
Transition time (rise and fall)
Refresh period
tRC
84
–
104
–
tRP
30
–
40
–
tRAS
50 10k 60 10k
tCAS
8
10k 10 10k
tASR
0
–
0
–
tRAH
8
–
10
–
tASC
0
–
0
–
tCAH
8
–
10
–
tRCD
12
37
14
45
tRAD
10
25
12
30
tRSH
13
15
–
tCSH
40
50
–
tCRP
5
–
5
–
tT
1
50
1
50
tREF
–
16
–
16
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
16E
Note
7
Read Cycle
Access time from RAS
tRAC
Access time from CAS
tCAC
Access time from column address
tAA
OE access time
tOEA
Column address to RAS lead time
tRAL
Read command setup time
tRCS
Read command hold time
tRCH
Read command hold time referenced to tRRH
RAS
CAS to output in low-Z
tCLZ
Output buffer turn-off delay
tOFF
Output turn-off delay from OE
tOEZ
–
50
–
60
ns 8, 9
–
13
–
15
ns 8, 9
–
25
–
30
ns 8,10
–
13
–
15
ns
25
–
30
–
ns
0
–
0
–
ns
0
–
0
–
ns 11
0
–
0
–
ns 11
0
–
0
–
ns 8
0
13
0
15
ns 12
0
13
0
15
ns 12
Semiconductor Group
9
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