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HYM72V8020GS-60 データシートの表示(PDF) - Siemens AG

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HYM72V8020GS-60 Datasheet PDF : 12 Pages
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8M × 72-Bit Dynamic RAM Module
(ECC - Module)
168 pin buffered DIMM Module
HYM 72V8020GS-50/-60
HYM 72V8030GS-50/-60
168 pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module
for PC main memory applications
1 bank 8 M x 72 organisation
Optimized for ECC applications
Fast Page Mode Operation
Performance:
tRAC
tCAC
tAA
tRC
tPC
RAS access time
CAS access time
Access time from address
Read/Write cycle time
Fast page mode cycle time
-50 -60
50 60 ns
18 20 ns
30 35 ns
90 110 ns
35 40 ns
Single + 3.3V ± 0.3 V supply
CAS-before-RAS refresh, RAS-only refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clock fully LVTTL & LVCMOS compatible
4 Byte interleave enabled, Dual Address inputs (A0/B0)
Buffered inputs excepts RAS and DQ
Parallel Presence Detects
Utilizes nine 8M × 8 -DRAMs and BiCMOS buffers/line drivers VT244A
Two versions: HYM 72V8030GS with SOJ-components ( 9 mm module thickness)
HYM 72V8020GS with TSOPII-components ( 4 mm module thickness)
4048 refresh cycles / 64 ms with 12 / 11 addressing
Gold contact pad
Double sided module with 25.35 mm (1000 mil) height
Semiconductor Group
1
6.96

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