M64811AGP データシートの表示（PDF） - MITSUBISHI ELECTRIC
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M64811AGP Datasheet PDF : 9 Pages
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MITSUBISHI ICs (COMMUNICATION)
M64811AGP
1.1GHz/500MHz DUAL PLL FREQUENCY SYNTHESIZER FOR DIGITAL CELLULAR PHONE
FUNCTION DESCRIPTION
1.Data Input
LE
SI
MSB
Invalid
D1 D2
LSB
D19 D20 D21 D22
CPS
Note 1) At the leading edge of the CPS input , the status of the SI input is written into the shift
register .
Note 2) The bit just before LE becomes "H" is LSB , and SI before MSB becomes invalid .
Note 3) When LE is "H" , the data stored in the shift registers is loaded into the appropriate latch .
2.Input Signal Timing
LE
SI
Valid data
tsu
th
CPS
tWH
tWL
tsu=th=tWH=tWL=0.1µsmin.
tCR=tRH=0.1µsmin.
tCR
tRH
3.Bit Configuration of Shift Register
LSB
Shift register 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Power on/off
setting
DA DB DC
Data latch
setting
DD DE
MSB
*
*
*
H
H
20
21
22
23
24
25
26
27
28
29
10
2
Invalid
Dividing ratio of reference counter
for reference frequency
MSB
*
*
*
L
H
20
21 22 2 3 24 20
21
22
23
24
25
26
27
28
29
10 11
22
Invalid
Dividing ratio of
swallow counter
Dividing ratio of programable counter
for local oscillator 1
MSB
*
*
*
HL
20
21 22 23 20
21 2 2 2 3 2 4 2 5
26
27
28
29
10 11
22
12
2
Invalid
Dividing ratio of
swallow counter
Dividing ratio of programable counter
for local oscillator 2
4
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