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M65580MAP データシートの表示(PDF) - Mitsumi

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M65580MAP Datasheet PDF : 30 Pages
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Preliminary
Note : This is not a final specification.
Some of information in this document are subject to changes.
Mitsubishi Semiconductor<Digital IC>
M65580MAP-XXXFP
Digital Video/Chroma/Deflection+MCU
[ASIC Block]
Description
CVBS(TV/EXT) signals or Y/C signals input to this IC are converted to 8 bit digital signal by 2 channels high speed video
ADCs. These signals are input to digital section to obtain high performance R/G/B signals. First, CVBS signals are separated
to high quality Y/C signals by 2 dimensional adaptive YC separation circuit, and then Y/C signals are converted to R-Y&B-Y
signals by digital chroma decoder, after that, to R/G/B signals by RGB matrix circuit. These signals are mixed with OSD
signals come from MCU block, are converted to analog R/G/B signals by 3 channel 10 bit high speed video DACs. In
deflection block, to get a better Horizontal & Vertical signals, a conventional analog solution by analog CMOS technology is
used.
ASIC block consists of the followings blocks.
(1) Analog frontend block ; Analog SW(2 CVBS(TV&EXT) inputs, Y/C signals to one signal), 2 channels 8 bit high speed video
ADCs , and ACC amplifiers
(2) Video and Chroma block ; A high performance 2 line adaptive YC separation by 1 line memory, Video blocks including
sharpness, YNR, a high performance blackstretch circuits, Chroma decoder, and RGB matrix including OSD mixing circuit.
(3) Deflection block ; A high performance sync separation by analog and digital mixed solution
(4) Analog backend block ; 3 channels 10 bit high speed video DACs for Cutoff & Drive, and Mute circuit.
Features
[Video/Chroma Block]
• Built-in 1 Video SW for TV/EXT signal input
• 2 additional pins for S(Y/C) input
• YUV input signal available ( T.B.D )
• 2 channel 8 bit Video ADCs for CVBS(TV&EXT) or Y/C signal inputs
• Built-in adaptive 2 line comb filter(2DYCS) => Few dot crawl&crosscolor, and clear color transition
• Built-in a high performance Blackstretch => Dynamic & detailed picture
• Digital Luminance delay circuit
=> stable Y/C timing adjustment
• Built-in VCXO circuit(4fsc)
• High resolution R/G/B output
=> Built-in 10bit high speed Video DACs
• Internal connection of 8 color digital OSD ( R/G/B, F.B, H.T )
• Reference CLK output for tuner (fsc or 4MHz)
• Built-in YNR ( about fsc±1MHz)
• Gamma correction(for R/G/B signals)
[Deflection Block]
• Analog(conventional) sync separation => Better performance by abundant experience
• Double AFC Circuit
=> Stable Horizontal scanning
• Built-in Horizontal reference Oscillator => No ceramic resonator and Adjustment free
• HD and VD pulse by Countdown
=> Stable HD&VD
• Built-in digital Vramp generator
[List of main I2C bus controllable Items]
• Chip
: Power-down mode
• Analog Input Stage : CVBS/Y&C Input SW
• Luminance Processing : Sharpness, Blackstretch
• Chroma Processing : Color, Tint, Killer level
• RGB Matrix
: ACL, OSD Input Level, Contrast, Brightness
• Analog Output Stage : Drive adj.(R/G/B), Cutoff adj.(R/G/B)
• Deflection Block
: H-Phase, V-size, V-shift, V-Linearity
MITSUBISHI
6

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