M65665CFP データシートの表示（PDF） - Renesas Electronics
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M65665CFP Datasheet PDF : 18 Pages
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M65665CFP/SP
Pin Description
Pin No. Name
I/O
1
SWM
CMOS output
2
OSD_SEL
CMOS input
3
SDATA
CMOS input/output (5V)*1
4
SCLK
CMOS input (5V)*1
5
DVdd
Digital Vdd
6
DVss
Digital Vss
7
BGPS
CMOS output
8
SCK
CMOS input
9
BGPM
CMOS output
10
FSC
CMOS input
11
TEST5
CMOS input
12
TESTEN
CMOS input
13
SWMG
CMOS input
14
RESET
CMOS input
15
CSYNCS
CMOS input
16
AVdd(ADC)
Analog Vdd
17
VIN(ADC)
Analog
18
UIN(ADC)
Analog
19
VRB
Analog
20
YIN(ADC)
Analog
21
VRT
Analog
22
CIN(ADC)
Analog
23
AVss(ADC)
Analog Vss
24
CVBSIN(ADC) Analog
25
AVdd(VCXO) Analog Vdd
26
FILTER
Analog
27
BIAS
Analog
28
X'tal(NTSC) Analog
29
TEST
Analog
30
TEST
Analog
31
AVss(VCXO) Analog Vss
32
HD
CMOS input (5V)*1
33
VD
CMOS input (5V)*1
34
Vdd(DAC)
Analog Vdd
35
OSD_BIN
Analog
36
V(B)OUT
Analog
37
VZ
Analog
38
OSD_GIN
Analog
39
U(G)OUT
Analog
40
AVss(DAC)
Analog Vss
41
OSD_RIN
Analog
42
Y(R)OUT
Analog
Note : 1. (5V) means 5V I/F tolerant
Function
PIP switch output
Output OSD select
IIC SDA input/output
IIC SCL input
VDD for digital part
VSS for digital part
Test output
Test input
Test output
Test input
Test input
Test input
PIP switch output enable
Power on reset input
Sub picture external c-sync input
Vdd for internal ADC
Sub picture V input of ADC
Sub picture U input of ADC
Low level reference voltage output of ADC
Sub picture Y input of ADC
High level reference voltage output of ADC
Sub picture C input of ADC
VSS for internal ADC
Sub picture CVBS input of ADC
Vdd for VCXO
VCXO filter voltage connection
VCXO bias voltage connection
X'tal of NTSC connection
TEST
TEST
Vss for VCXO
Main picture HD input
Main picture VD input
Vdd for DAC
OSD input of B
Sub picture V or B output
Voltage reference output of DAC
OSD input of G
Sub picture U or G output
Vss for DAC
OSD input of R
Sub picture Y or R output
Remarks
connect to GND
connect to GND
connect to GND
connect to GND
connect to VDD
connect to GND
connect to GND
Rev.2.00, Sep.04.2003, page 6 of 17
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