M65824AFP データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M65824AFP

CD PLAYER DIGITAL SIGNAL PROCESSOR WITH BUILT-IN DAC

MITSUBISHI ELECTRIC  

MITSUBISHI SOUND PROCESSOR ICs

M65824AFP

CD PLAYER DIGITAL SIGNAL PROCESSOR WITH BUILT-IN DAC

MCK:Microcomputer clock line for clocking bits to or from the

M65824AFP.

MSD:Microcomputer data line for sending or receiving data bits from

the M65824AFP.

(3) Operation

*Microcomputer command read/write operation

The data bits (MSD) are accepted on the rising edge of the clock

pulse(MCK).The falling edge of the latch line(MLAB) decides the

complete command.

At the same moment the data line is switched to output mode and

indicates the status as requested by data bits D3,D2,D1 and D0.

When the latch line becomes high,the data line is switched to

input mode.

*Status request / interface command

If the microcomputer wants to read a certain status, it has to

write a status request command with the appropriate bits D3,D2,D1

and D0 to the M65824AFP. After latching the command into the

M65824AFP, the data line becomes the request status information

as long as the latch line(MLAB) remains low.

(4) Microcomputer I/O timing

MSD

D0 D1 D2 D3 D4 D5 D6 D7 Status

MCK

t1

t2 t3

t4

MLAB

t5

t1:Shift clock width

(min.200nsec)

t2:Shift clock setup time (min.100nsec)

t3:Shift clock hold time (min.100nsec)

t4.Latch pulse setup time (min.100nsec)

t5:Latch pulse width 50nsec t5 50µs

Subcode-Q reading:50nsec t5

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