MACH2 データシートの表示（PDF） - Lattice Semiconductor

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MACH2

High-Performance EE CMOS Programmable Logic

Lattice Semiconductor 

From

n

Logic

Allocator

To

I/O

From

n

Cell

Logic

Allocator

To

I/O

Cell

To Switch

Matrix

To Switch

Matrix

a. Combinatorial, active high

b. Combinatorial, active low

From

From

Logic

n

Allocator

To

D APQ

I/O

Logic

n

Allocator

D APQ

To

I/O

CLK0

Cell

CLK0

Cell

CLKn

AR

CLKn

AR

To Switch

Matrix

To Switch

Matrix

c. D-type register, active high

d. D-type register, active low

From

From

Logic

Allocator

n

T APQ

To

Logic

I/O

Allocator

n

T AP Q

To

I/O

CLK0

Cell

CLK0

Cell

CLKn

AR

AR

CLKn

To Switch

Matrix

To Switch

Matrix

e. T-type register, active high

f. T-type register, active low

From

Logic

n

Allocator

CLK0

L APQ

From

To

Logic

n

I/O

Allocator

Cell

CLK0

L APQ

To

I/O

Cell

CLKn

G AR

CLKn

G AR

To Switch

Matrix

To Switch

Matrix

g. Latch, active high (MACH 2 only)

h. Latch, active low (MACH 2 only)

14051K-005

Figure 4. Output Macrocell Configurations

MACH 1 & 2 Families

9

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