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MM74C90N データシートの表示(PDF) - Fairchild Semiconductor

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MM74C90N
Fairchild
Fairchild Semiconductor Fairchild
MM74C90N Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
October 1987
Revised January 1999
MM74C90 • MM74C93
4-Bit Decade Counter • 4-Bit Binary Counter
General Description
The MM74C90 decade counter and the MM74C93 binary
counter and complementary MOS (CMOS) integrated cir-
cuits constructed with N- and P-channel enhancement
mode transistors. The 4-bit decade counter can reset to
zero or preset to nine by applying appropriate logic level on
the R01, R02, R91 and R92 inputs. Also, a separate flip-flop
on the A-bit enables the user to operate it as a divide-by-2,
5 or 10 frequency counter. The 4-bit binary counter can be
reset to zero by applying high logic level on inputs R01 and
R02, and a separate flip-flop on the A-bit enables the user
to operate it as a divide-by-2, -8, or -16 divider. Counting
occurs on the negative going edge of the input pulse.
All inputs are protected against static discharge damage.
Features
s Wide supply voltage range: 3V to 15V
s Guaranteed noise margin: 1V
s High noise immunity: 0.45 VCC (typ.)
s Low power compatibility:
Fan out of 2 TTL driving 74L
s The MM74C93 follows the MM74L93 Pinout
Ordering Code:
Order Number
MM74C90N
MM74C93N
Package Number
N14A
N14A
Package Description
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Connection Diagrams
MM74C90
Pin Assignments for DIP
MM74C93
Top View
Top View
© 1999 Fairchild Semiconductor Corporation DS005889.prf
www.fairchildsemi.com

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