MX29LV800BB データシートの表示（PDF） - Macronix International

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MX29LV800BB

8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY

Macronix International 

MX29LV800BT/BB

QUERY COMMAND AND COMMON FLASH

INTERFACE (CFI) MODE ( for MX29LV800BT/

BB)

MX29LV800BT/BB is capable of operating in the CFI

mode. This mode all the host system to determine the

manufacturer of the device such as operating param-

eters and configuration. Two commands are required in

CFI mode. Query command of CFI mode is placed first,

then the Reset command exits CFI mode. These are

described in Table 6.

The single cycle Query command is valid only when the

device is in the Read mode, including Erase Suspend,

Standby mode, and Read ID mode; however, it is ig-

nored otherwise.

The Reset command exits from the CFI mode to the

Read mode, or Erase Suspend mode, or read ID mode.

The command is valid only when the device is in the

CFI mode.

TABLE 4-1. CFI mode: Identification Data Values

(All values in these tables are in hexadecimal)

Description

Address

(Byte Mode)

Query-unique ASCII string "QRY"

20

22

24

Primary vendor command set and control interface ID code

26

28

Address for primary algorithm extended query table

2A

2C

Alternate vendor command set and control interface ID code (none)

2E

30

Address for secondary algorithm extended query table (none)

32

34

Address

(Word Mode)

10

11

12

13

14

15

16

17

18

19

1A

Data

0051

0052

0059

0002

0000

0040

0000

0000

0000

0000

0000

TABLE 4-2. CFI Mode: System Interface Data Values

(All values in these tables are in hexadecimal)

Description

VCC supply, minimum (2.7V)

VCC supply, maximum (3.6V)

VPP supply, minimum (none)

VPP supply, maximum (none)

Typical timeout for single word/byte write (2N us)

Typical timeout for Minimum size buffer write (2N us)

Typical timeout for individual block erase (2N ms)

Typical timeout for full chip erase (2N ms)

Maximum timeout for single word/byte write times (2N X Typ)

Maximum timeout for buffer write times (2N X Typ)

Maximum timeout for individual block erase times (2N X Typ)

Maximum timeout for full chip erase times (not supported)

P/N:PM1062

8

Address

(Byte Mode)

36

38

3A

3C

3E

40

42

44

46

48

4A

4C

Address

(Word Mode)

1B

1C

1D

1E

1F

20

21

22

23

24

25

26

Data

0027

0036

0000

0000

0004

0000

000A

0000

0005

0000

0004

0000

REV. 1.3, DEC. 20, 2004

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