SMP18FPZ データシートの表示（PDF） - Analog Devices
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SMP18FPZ Datasheet PDF : 8 Pages
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SMP18
APPLICATION TIPS
All unused digital inputs should be connected to logic LOW.
For analog inputs that may become temporarily disconnected, a
resistor to VDD, VSS or analog ground should be used with a
value ranging from 200 kΩ to 1 MΩ.
Do not apply signals to the SMP18 with power off unless the in-
put current is limited to less than 10 mA.
TYPICAL APPLICATIONS
An 8-Channel Multiplexed D/A Converter
Figure 1 illustrates a typical demultiplexing function of the
SMP18. It is used to sample-and-hold eight different output
voltages corresponding to eight different digital codes from a
D/A converter. The SMP18’s droop rate of 40 mV/s requires a
refresh once every 250 ms before the voltage drifts beyond
1/2 LSB accuracy (1 LSB of an 8-bit DAC is equivalent to
19.5 mV out of a full-scale voltage of 5 V). For a 10-bit DAC
the refresh rate must be less than 60 ms, and for a 12-bit
system, 15 ms. This implementation is very cost effective com-
pared to using multiple DACs as the number of output channels
increases.
+12V
REF02
+12V
+5V
DIGITAL
INPUTS
4
VREFA
17
VDD
DAC8228 VOA 3
3
WR
CS
VZ
GND
1
16 15
5
WR
ADDRESS
BUS
ADDRESS
DECODE
A
11
B
10
C
9
DGND
8
INH
6
SMP18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
13 CH0
14 CH1
15 CH2
12 CH3
1 CH4
5 CH5
2 CH6
4 CH7
+12V
VSS
16
7
0.1µF
CHANNEL DECODING
PIN 9 PIN 10 PIN 11 PIN 6
C
B
A
INH
CH PIN
0
0
0
0
0
13
0
0
1
0
1
14
0
1
0
0
2
15
0
1
1
0
3
12
1
0
0
0
4
1
1
0
1
0
5
5
1
1
0
0
6
2
1
1
1
0
7
4
X
X
X
1
NONE –
Figure 1. 8-Channel Multiplexed D/A Converter
REV. C
–7–
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