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STV9211 データシートの表示(PDF) - STMicroelectronics

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STV9211 Datasheet PDF : 37 Pages
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Functional description
Figure 4: BPCP and OCL generation
HS
External
1
HS Edge Selection
R8-bit1
BPCP Source Selection
R8-bit4
Source Selection
R8-bit0
Width Selection
R8-bit2 & bit3
Automatic
Polarity
Edge
Selection
Pulse
Generation
BPCP
Internal
BLK
External
20
Polarity
Selection
BLK Polarity
Selection: R9-bit0
Pulse
Generation
OCL
Internal
OCL source
Selection: R8-bit7
STV9211
2.2 Fast blanking input
The fast blanking pin (FBLK) is TTL compatible. When it is at high level, the input signal is blanked
and replaced by OSD insets defined by binary levels on three OSD inputs and a dedicated OSD
contrast adjustment stage.
2.3 Blanking input
The blanking input BLK is TTL compatible. The active level is either high (positive pulse polarity) or
low (negative pulse polarity). When the level is active, the RGB outputs are at infra-black level,
regardless of the input level. The pulse on the BLK input defines the timing of the internal OCL
signal and it can also define the timing of the internal BPCP pulse. See Figure 4, Figure 11 and
Chapter 9: I2C register description .
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