T221160A-30J データシートの表示（PDF） - Taiwan Memory Technology
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T221160A-30J Datasheet PDF : 14 Pages
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T221160A
AC CHARACTERISTICS (note 1,2,3) (Ta = 0 to 70°C)
AC TEST CONDITIONS:
Vcc=5V ±10%, input pulse level = 0 to 3V
Input rise and fall times: 2ns
Output Load: 2TTL gate + CL (50pF)
AC CHARACTERISTICS
PARAMETER
SYM
-25
-30
-35
-40 UNIT Notes
MIN MAX MIN MAX MIN MAX MIN MAX
Read or Write Cycle Time
Read-Modify-Write Cycle Time
Fast-Page-Mode Read or Write Cycle Time
Fast-Page-Mode Read-Write Cycle Time
Access Time From RAS
Access Time From CAS
Access Time From OE
Access Time From Column Address
Access Time From CAS Precharge
RAS Pulse Width
RAS Pulse Width
RAS Hold Time
RAS Precharge Time
CAS Pulse Width
CAS Hold Time
CAS Precharge Time
RAS to CAS Delay Time
CAS to RAS Precharge Time
Row Address Setup Time
Row Address Hold Time
RAS to Column Address Delay Time
Column Address Setup Time
Column Address Hold Time
Column Address Hold Time (Reference to
RAS )
tRC 43
55
65
75
ns
tRWC 65
85
95
105
ns
tPC 15
20
23
25
ns
tPCM 37
42
49
52
ns
tRAC
25
30
35
40 ns 4
tCAC
7
8
9
10 ns 5
tOAC
7
8
9
10 ns 13
tAA
12
16
18
20 ns 8
tACP
14
18
20
22 ns
tRAS 25 10K 30 10K 35 10K 40 10K ns
tRASC 25 100K 30 100K 35 100K 40 100K ns
tRSH 7
8
9
10
ns
tRP 15
20
23
25
ns
tCAS 4 10K 6 10K 8 10K 10 10K ns
tCSH 21
26
30
35
ns
tCP 3
3
4
5
ns
tRCD 10 17 10 21 10 25 10 29 ns 7
tCRP 3
3
3
5
ns
tASR 0
0
0
0
ns
tRAH 5
5
5
5
ns
tRAD 8 13 8 14 8 16 8 18 ns 8
tASC 0
0
0
0
ns
tCAH 4
4
4
5
ns
ns
tAR 22
26
30
34
Column Address to RAS Lead Time
tRAL 12
14
16
18
ns
Read Command Setup Time
tRCS 0
0
0
0
ns 14
Read Command Hold Time Reference to CAS tRCH 0
0
0
0
ns 9,14
Read Command Hold Time Reference to RAS tRRH 0
0
0
0
ns 9
CAS to Output in Low-Z
tCLZ 3
3
3
3
ns
Output Buffer Turn-off Delay From CAS or
RAS
ns 10,16
tOFF1 3 15 3 15 3 15 3 15
Taiwan Memory Technology, Inc. reserves the right P. 5
to change products or specifications without notice.
Publication Date: FEB. 2002
Revision:A
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