T5760 データシートの表示（PDF） - Atmel Corporation

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T5760

UHF ASK/FSK Receiver

Atmel Corporation 

T5760 / T5761

Sleep mode:

All circuits for signal processing are

disabled. Only XTO and Polling logic is

enabled.

Output level on Pin IC_ACTIVE => low

IS = ISoff

TSleep = Sleep × XSleep × 1024 × TClk

Start-up mode:

The signal processing circuits are enabled.

After the start-up time (TStartup) all circuits

are in stable condition and ready to receive.

Output level on Pin IC_ACTIVE => high

IS = ISon

TStartup

Sleep:

XSleep:

TClk:

TStartup:

5-bit word defined by Sleep0 to

Sleep4 in OPMODE register

Extension factor defined by

XSleepStd

according to table 9

Basic clock cycle defined by fXTO

and Pin MODE

Is defined by the selected baud rate

range and TClk. The baud-rate range

is defined by Baud0 and Baud1 in

the OPMODE register.

Bit-check mode:

The incomming data stream is analyzed. If

the timing indicates a valid transmitter

signal, the receiver is set to receiving mode.

Otherwise it is set to Sleep mode.

Output level on Pin IC_ACTIVE => high

IS = ISon

TBit-check

Bit check

NO

OK ?

YES

Receiving mode:

The receiver is turned on permanently and

passes the data stream to the connected mC.

It can be set to Sleep mode through an OFF

command via Pin DATA or POLLING/_ON.

Output level on Pin IC_ACTIVE => high

IS = ISon

OFF command

TBit-check:

Depends on the result of the

bit check

If the bit check is ok, TBit-check

depends on the number of bits to be

checked (NBit-check) and on the

utilized data rate.

If the bit check fails, the average

time period for that check depends

on the selected baud-rate range and

on TClk. The baud-rate range is

defined by Baud0 and Baud1 in the

OPMODE register.

( Number of checked Bits: 3 )

Figure 8. Polling mode flow chart

Bit check ok

IC_ACTIVE

Bit check

Dem_out

1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit

Data_out (DATA)

TStart–up

Start–up mode

TBit–check

Bit–check mode

Receiving mode

Figure 9. Timing diagram for complete successful bit check

8 (32)

Rev. A2, 19-Oct-00

Preliminary Information

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