TCN75(2002) データシートの表示（PDF） - Microchip Technology
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TCN75 Datasheet PDF : 18 Pages
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TCN75
4.3.1 ADDRESS BYTE
Immediately following the START condition, the host
must next transmit the address byte to the TCN75. The
four Most Significant bits of the Address Byte (A6, A5,
A4, A3) are fixed to 1001(B). The states of A2, A1 and
A0 in the serial bit stream must match the states of the
A2, A1 and A0 address inputs for the TCN75 to
respond with an Acknowledge (indicating the TCN75 is
on the bus and ready to accept data). The eighth bit in
the Address Byte is a Read/Write Bit. This bit is a ‘1’ for
a read operation or ‘0’ for a write operation.
4.3.2 ACKNOWLEDGE (ACK)
Acknowledge (ACK) provides a positive handshake
between the host and the TCN75. The host releases
SDA after transmitting eight bits then generates a ninth
clock cycle to allow the TCN75 to pull the SDA line
LOW to acknowledge that it successfully received the
previous eight bits of data or address.
4.3.3 DATA BYTE
After a successful ACK of the address byte, the host
must next transmit the data byte to be written or clock
out the data to be read. (See the appropriate timing
diagrams.) ACK will be generated after a successful
write of a data byte into the TCN75.
4.3.4 STOP CONDITION (STOP)
Communications must be terminated by a STOP
condition (a LOW to HIGH transition of SDA while SCL
is HIGH). The STOP condition must be communicated
by the transmitter to the TCN75.
4.3.5 POWER SUPPLY
To minimize temperature measurement error, the
TCN75-3.3MOA and TCN75-3.3MUA are factory cali-
brated at a supply voltage of 3.3V ±5% and the TCN75-
5.0MOA and TCN75-5.0MUA are factory calibrated at
a supply voltage of 5V ±5%. Either device is fully
operational over the power supply voltage range of
2.7V to 5.5V, but with a lower measurement accuracy.
The typical value of this power supply-related error is
±2°C.
DS21490B-page 8
© 2002 Microchip Technology Inc.
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