TJA1041A データシートの表示（PDF） - NXP Semiconductors.

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TJA1041A

High-speed CAN transceiver

NXP Semiconductors. 

NXP Semiconductors

TJA1041A

High-speed CAN transceiver

7.1.3 Standby mode

The Standby mode is the first-level power saving mode of the transceiver, offering reduced

current consumption. In Standby mode the transceiver is not able to transmit or receive

data and the low-power receiver is activated to monitor bus activity. The bus pins are

biased at ground level (via Ri(cm)). Pin INH is still active, so voltage regulators controlled

by this pin INH will be active too.

Pins RXD and ERR will reflect any wake-up requests (provided that VI/O and VCC are

present).

7.1.4 Go-to-sleep command mode

The Go-to-sleep command mode is the controlled route for entering Sleep mode. In

Go-to-sleep command mode the transceiver behaves as if in Standby mode, plus a

Go-to-sleep command is issued to the transceiver. After remaining in Go-to-sleep

command mode for the minimum hold time (th(min)), the transceiver will enter Sleep mode.

The transceiver will not enter the Sleep mode if the state of pins STB or EN is changed or

the UVBAT, pwon or wake-up flag is set before th(min) has expired.

7.1.5 Sleep mode

The Sleep mode is the second-level power saving mode of the transceiver. Sleep mode is

entered via the Go-to-sleep command mode, and also when the undervoltage detection

time on either VCC or VI/O elapses before that voltage level has recovered. In Sleep mode

the transceiver still behaves as described for Standby mode, but now pin INH is set

floating. Voltage regulators controlled by pin INH will be switched off, and the current into

pin VBAT is reduced to a minimum. Waking up a node from Sleep mode is possible via the

wake-up flag and (as long as the UVNOM flag is not set) via pin STB.

7.2 Internal flags

The TJA1041A makes use of seven internal flags for its fail-safe fallback mode control and

system diagnosis support. Table 4 shows the relation between flags and operating modes

of the transceiver. Five of the internal flags can be made available to the controller via

pin ERR. Table 5 shows the details on how to access these flags. The following sections

describe the seven internal flags.

Table 5.

Internal

flag

UVNOM

UVBAT

pwon

wake-up

Accessing internal flags via pin ERR

Flag is available on pin ERR[1]

Flag is cleared

no

by setting the pwon or wake-up flag

no

in Pwon/Listen-only mode (coming from

Standby mode, Go-to-sleep command

mode, or Sleep mode)

when VBAT has recovered

on entering Normal mode

in Standby mode, Go-to-sleep command on entering Normal mode, or by setting

mode, and Sleep mode (provided that VI/O the pwon or UVNOM flag

and VCC are present)

TJA1041A_4

Product data sheet

Rev. 04 — 29 July 2008

© NXP B.V. 2008. All rights reserved.

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