TJA1041A データシートの表示（PDF） - NXP Semiconductors.

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TJA1041A

High-speed CAN transceiver

NXP Semiconductors. 

NXP Semiconductors

TJA1041A

High-speed CAN transceiver

immediately available on pins ERR and RXD (provided that VI/O and VCC are present).

The flag is cleared at power-on, or when the UVNOM flag is set or the transceiver enters

Normal mode.

7.2.5 Wake-up source flag

Wake-up source recognition is provided via the wake-up source flag, which is set when

the wake-up flag is set by a local wake-up request via pin WAKE. The wake-up source flag

can only be set after the pwon flag is cleared. In Normal mode the wake-up source flag

can be made available on pin ERR. The flag is cleared at power-on or when the

transceiver leaves Normal mode.

7.2.6 Bus failure flag

The bus failure flag is set if the transceiver detects a bus line short circuit condition to

VBAT, VCC or GND during four consecutive dominant-recessive cycles on pin TXD, when

trying to drive the bus lines dominant. In Normal mode the bus failure flag can be made

available on pin ERR. The flag is cleared when the transceiver reenters Normal mode.

7.2.7 Local failure flag

In Normal mode or Pwon/Listen-only mode the transceiver can recognize five different

local failures and will combine them into one local failure flag. The five local failures are:

TXD dominant clamping, RXD recessive clamping, a TXD-to-RXD short circuit, bus

dominant clamping, and overtemperature. Nature and detection of these local failures is

described in Section 7.3. In Pwon/Listen-only mode the local failure flag can be made

available on pin ERR. The flag is cleared when entering Normal mode or when RXD is

dominant while TXD is recessive, provided that all local failures are resolved.

7.3 Local failures

The TJA1041A can detect five different local failure conditions. Any of these failures will

set the local failure flag. In most cases the transmitter of the transceiver will be disabled.

The following sections give the details.

7.3.1 TXD dominant clamping detection

A permanent LOW-level on pin TXD (due to a hardware or software application failure)

would drive the CAN bus into a permanent dominant state, blocking all network

communication. The TXD dominant time-out function prevents such a network lockup by

disabling the transmitter of the transceiver if pin TXD remains at a LOW level for longer

than the TXD dominant time-out tdom(TXD). The tdom(TXD) timer defines the minimum

possible bit rate of 40 kbit/s. The transmitter remains disabled until the local failure flag is

cleared.

7.3.2 RXD recessive clamping detection

An RXD pin clamped to HIGH-level will prevent the controller connected to this pin from

recognizing a bus dominant state. So the controller can start messages at any time, which

is likely to disturb all bus communication. RXD recessive clamping detection prevents this

effect by disabling the transmitter when the bus is in dominant state without RXD reflecting

this. The transmitter remains disabled until the local failure flag is cleared.

TJA1041A_4

Product data sheet

Rev. 04 — 29 July 2008

© NXP B.V. 2008. All rights reserved.

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