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UPB1507GV-E1 データシートの表示(PDF) - California Eastern Laboratories.

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UPB1507GV-E1
CEL
California Eastern Laboratories. CEL
UPB1507GV-E1 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
UPB1506GV, UPB1507GV
ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C)
SYMBOLS PARAMETERS
UNITS
RATINGS
VCC
VIN
PIN
PD
TOP
TSTG
Supply Voltage
Input Voltage
Input Power
Power Dissipation2
Operating Temperature
Storage Temperature
V
V
dBm
mW
°C
°C
-0.5 to 6.0
-0.5 to Vcc + 0.5
+10
250
-45 to +85
-55 to +150
Notes:
1. Operation in excess of any one of these parameters may result
in permanent damage.
2. Mounted on a double-sided copper clad 50x50x1.6 mm epoxy
glass PWB (TA = +85˚C).
RECOMMENDED
OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC Supply Voltage
TOP Operating Temperature
UNITS MIN TYP MAX
V 4.5 5.0 5.5
°C -40 +25 +85
PIN DESCRIPTIONS
Pin No.
UPB1506GV UPB1507GV
2
1
Pin
Name
IN
3
8
IN
4
5
GND
1
3
SW1
6
6
SW2
8
2
VCC
7
4
OUT
5
7
NC
Applied
Voltage
(V)
0
H/L
Pin
Voltage
(V)
2.9
2.9
4.5 to 5.5
2.6 to 4.7
Description
Signal input pin. This pin should be coupled to the source with a capacitor
(eg 1000 pF).
Signal input bypass pin. This pin must be equipped with a bypass
capacitor (eg 1000 pF) to ground.
Ground pin. Ground pattern on the board should be formed as wide as
possible to minimize ground impedance.
Divided ratio input pin. The ratio can be controlled by the following input
data to these pins.
H
SW1
L
SW2
H
L
÷64
÷128
÷128
÷256
These pins should be equipped with a bypass capacitor (e.g. 1000 pF) to
ground.
Power supply pin. This pin must be equipped with bypass capacitor
(eg 1000 pF) to ground.
Divided frequency output pin. This pin is designed as an emitter follower
output. This pin can be connected to CMOS input due to 1.2 Vp-p MIN
output.
No connection. This pin must be opened.

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