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UPC2798GR データシートの表示(PDF) - NEC => Renesas Technology

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UPC2798GR
NEC
NEC => Renesas Technology NEC
UPC2798GR Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPC2798GR
PIN EXPLANATIONS
Pin No. Symbol
1
AGC IN1
2
AGC IN2
Pin Voltage
(V, TYP.)
Explanation
1.5
Input pin of IF signal.
1pin is same phase and 2pin is opposite
phase at balance input.
In case of single input, 1pin or 2pin should
be grounded through capacitor.
1.5
Equivalent Circuit
4
AGC
control
Reg
3
VAGC
0 to 5
Automatic gain control pin.
This pin’s bias govern the AGC output level.
Minimum gain at VAGC = 0 V
Maximum gain at VAGC = 5 V
Recommend to use by deviding AGC voltage
with externally resistor (ex. 100 k).
1
2
4
3
AGC
control
4
Vcc1
5
OSC
OUT
5.0
Power supply pin of IF down convertor block.
Must be connected bypass capacitor to
minimize ground impedance.
4.0
Output pin of Oscillator frequency.
Connected to PLL symthesizer IC’s input pin.
6
GND
7
OSC B2
8
OSC C1
9
OSC C2
0.0
Ground pin.
Must be connected to the system ground
with minimum inductance.
Ground pattern on the board should be
formed as wide as possible.
2.4
Internal oscillator consist in balance amplifier.
7 and 8pins, 9 and 10 pins should be
externally connected to oscillate with active
4.6
feedback loop.
Connected LC resonator between 7pin and
10pin.
4.6
10 OSC B1
2.4
Data Sheet P11998EJ3V0DS00
4
5
Reg
7 8 4 9 10
Reg
Reg
3

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