XC2267-XXF66L データシートの表示（PDF） - Infineon Technologies

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XC2267-XXF66L

16/32-Bit Single-Chip Microcontroller with 32-Bit Performance Volume 1 (of 2): Peripheral Units

Infineon Technologies 

XC2000 Derivatives

System Units (Vol. 1 of 2)

Preliminary

Introduction

Integrated On-Chip Memories

• 1 Kbyte on-chip Stand-By RAM (SBRAM) for data to preserved during power-saving

• 2 Kbytes Dual-Port RAM (DPRAM) for variables, register banks, and stacks

• 16 Kbytes on-chip high-speed Data SRAM (DSRAM) for variables and stacks

• Up to 64 Kbytes on-chip high-speed Program/Data SRAM (PSRAM) for code and data

• Up to 764 Kbytes on-chip Flash Program Memory for instruction code or constant data

Note: The system stack can be located in any memory area within the complete

addressing range.

16-Priority-Level Interrupt System

• 96 interrupt nodes with separate interrupt vectors on 15 priority levels (8 group levels)

• 7 cycles minimum interrupt latency in case of internal program execution

• Fast external interrupts

• Programmable external interrupt source selection

• Programmable vector table (start location and step-width)

8-Channel Peripheral Event Controller (PEC

• Interrupt driven single cycle data transfer

• Programmable PEC interrupt request level, (15 down to 8)

• Transfer count option

(standard CPU interrupt after programmable number of PEC transfers)

• Separate interrupt level for PEC termination interrupts selectable

• Overhead from saving and restoring system state for interrupt requests eliminated

• Full 24-bit addresses for source and destination pointers, supporting transfers within

the total address space

Intelligent On-Chip Peripheral Subsystems

• Two synchronizable A/D Converters with programmable resolution (10-bit or 8-bit)

and conversion time (down to approx. 1 µs), up to 24 analog input channels, auto scan

modes, channel injection, data reduction features

• One Capture/Compare Unit with 2 independent time bases,

very flexible PWM unit/event recording unit with different operating modes,

includes two 16-bit timers/counters, maximum resolution fSYS

• Up to Four Capture/Compare Units for flexible PWM Signal Generation (CCU6)

(3/6 Capture/Compare Channels and 1 Compare Channel)

• Two Multifunctional General Purpose Timer Units:

– GPT1: three 16-bit timers/counters, maximum resolution fSYS/4

– GPT2: two 16-bit timers/counters, maximum resolution fSYS/2

• Six Serial Channels with baud rate generator, receive/transmit FIFOs, programmable

data length and shift direction, usable as UART, SPI-like, IIC, IIS, and LIN interface

User’s Manual

1-6

V1.0, 2007-06

Intro, V1.0

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